公开(公告)号：US10431680B2

公开(公告)日：2019-10-01

申请号：US15391888

申请日：2016-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungsam Lee ,  Junsoo Kim ,  Hyoshin Ahn ,  Satoru Yamada ,  Joohyun Jeon ,  MoonYoung Jeong ,  Chunhyung Chung ,  Min Hee Cho ,  Kyo-Suk Chae ,  Eunae Choi

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/04

Abstract: A semiconductor device including a semiconductor substrate including a trench, the semiconductor substrate having a crystal structure; and an insulating layer covering an inner sidewall of the trench, wherein the inner sidewall of the trench has at least one plane included in a {320} family of planes of the crystal structure or at least one plane similar to the {320} family of planes.

公开(公告)号：US11522064B2

公开(公告)日：2022-12-06

申请号：US17206832

申请日：2021-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangjun Yun ,  Uihui Kwon ,  Seongnam Kim ,  Hyoshin Ahn

IPC: H01L29/49 ,  H01L29/78 ,  H01L29/66 ,  H01L21/28

Abstract: Provided are metal oxide field-effect transistor (MOSFET) devices having a metal gate structure, in which a work function of the metal gate structure is uniform along a length direction of a channel, and manufacturing methods thereof. The MOSFET devices include a semiconductor substrate, an active area on the semiconductor substrate and extending in a first direction, and a gate structure on the semiconductor substrate. The gate structure extends across the active area in a second direction that traverses the first direction and comprises a high-k layer, a first metal layer, a work function control (WFC) layer, and a second metal layer, which are sequentially stacked on the active area. A lower surface of the WFC layer may be longer than a first interface between a lower surface of the first metal layer and an upper surface of the high-k layer in the first direction.

公开(公告)号：US10347684B2

公开(公告)日：2019-07-09

申请号：US15848733

申请日：2017-12-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Honglae Park ,  Jaeho Kim ,  Hyoshin Ahn ,  Inkook Jang

IPC: H01L31/18 ,  H01L27/146 ,  H01L31/0248 ,  H04N5/361

Abstract: An image sensor includes a substrate including a photoelectric conversion part therein, and a fixed charge layer provided above the substrate. The fixed charge layer includes a first metal oxide and a second metal oxide, which are different from each other. The first metal oxide includes a first metal, and the second metal oxide includes a second metal different from the first metal. Concentration of the first metal in the fixed charge layer progressively increases from an upper portion of the fixed charge layer to a lower portion of the fixed charge layer.

公开(公告)号：US11791394B2

公开(公告)日：2023-10-17

申请号：US18053777

申请日：2022-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangjun Yun ,  Uihui Kwon ,  Seongnam Kim ,  Hyoshin Ahn

IPC: H01L29/49 ,  H01L29/78 ,  H01L29/66 ,  H01L21/28

CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7851

Abstract: Provided are metal oxide field-effect transistor (MOSFET) devices having a metal gate structure, in which a work function of the metal gate structure is uniform along a length direction of a channel, and manufacturing methods thereof. The MOSFET devices include a semiconductor substrate, an active area on the semiconductor substrate and extending in a first direction, and a gate structure on the semiconductor substrate. The gate structure extends across the active area in a second direction that traverses the first direction and comprises a high-k layer, a first metal layer, a work function control (WFC) layer, and a second metal layer, which are sequentially stacked on the active area. A lower surface of the WFC layer may be longer than a first interface between a lower surface of the first metal layer and an upper surface of the high-k layer in the first direction.

公开(公告)号：US20230048180A1

公开(公告)日：2023-02-16

申请号：US17872634

申请日：2022-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Segab Kwon ,  Hyoshin Ahn ,  Daesin Kim ,  Inkook Jang

IPC: H01L27/24

Abstract: A memory device includes a plurality of first conductive lines on a substrate and extending in a first direction, a plurality of second conductive lines on the plurality of first conductive lines and extending in a second direction intersecting the first direction, and a plurality of memory cells respectively between the plurality of first conductive lines and the plurality of second conductive lines. Each of the plurality of memory cells includes a switching element and a variable resistance material layer. The switching element includes a material having a composition of [GeX PY SeZ](1-W) [O]W, where 0.15≤X≤0.50, 0.15≤Y≤0.50, 0.35≤Z≤0.70, and 0.01≤W≤0.10.