公开(公告)号：US10714467B2

公开(公告)日：2020-07-14

申请号：US16275768

申请日：2019-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-jo Kim ,  Joong-won Jeon

IPC: H01L27/02 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L27/088

Abstract: Provided is an integrated circuit (IC) device including a logic cell having an area defined by a cell boundary. The logic cell includes a first device region, a device isolation region, and a second device region. The first device region and the second device region are arranged apart from each other in a first direction that is perpendicular to a second direction. The device isolation region is between the first device region and the second device region. A first maximum length of the first device region in the second direction is less than a width of the cell boundary in the second direction, and a second maximum length of the second device region is substantially equal to the width of the cell boundary in the second direction.

公开(公告)号：US11626396B2

公开(公告)日：2023-04-11

申请号：US17494390

申请日：2021-10-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-jo Kim ,  Joong-won Jeon

IPC: H01L27/02 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L27/088

Abstract: Provided is an integrated circuit (IC) device including a logic cell having an area defined by a cell boundary. The logic cell includes a first device region, a device isolation region, and a second device region. The first device region and the second device region are arranged apart from each other in a first direction that is perpendicular to a second direction. The device isolation region is between the first device region and the second device region. A first maximum length of the first device region in the second direction is less than a width of the cell boundary in the second direction, and a second maximum length of the second device region is substantially equal to the width of the cell boundary in the second direction.

公开(公告)号：US11152349B2

公开(公告)日：2021-10-19

申请号：US16871414

申请日：2020-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-jo Kim ,  Joong-won Jeon

IPC: H01L27/02 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L27/088

Abstract: Provided is an integrated circuit (IC) device including a logic cell having an area defined by a cell boundary. The logic cell includes a first device region, a device isolation region, and a second device region. The first device region and the second device region are arranged apart from each other in a first direction that is perpendicular to a second direction. The device isolation region is between the first device region and the second device region. A first maximum length of the first device region in the second direction is less than a width of the cell boundary in the second direction, and a second maximum length of the second device region is substantially equal to the width of the cell boundary in the second direction.

公开(公告)号：US11145640B2

公开(公告)日：2021-10-12

申请号：US16871441

申请日：2020-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-jo Kim ,  Joong-won Jeon

IPC: H01L27/02 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L27/088

Abstract: Provided is an integrated circuit (IC) device including a logic cell having an area defined by a cell boundary. The logic cell includes a first device region, a device isolation region, and a second device region. The first device region and the second device region are arranged apart from each other in a first direction that is perpendicular to a second direction. The device isolation region is between the first device region and the second device region. A first maximum length of the first device region in the second direction is less than a width of the cell boundary in the second direction, and a second maximum length of the second device region is substantially equal to the width of the cell boundary in the second direction.

公开(公告)号：US10109629B2

公开(公告)日：2018-10-23

申请号：US15355726

申请日：2016-11-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-youn Kim ,  Hyun-jo Kim

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/78 ,  H01L27/092 ,  H01L29/51 ,  H01L21/8238 ,  H01L21/8234

Abstract: A semiconductor device includes: a semiconductor substrate including an active region and a gate structure on the active region. The gate structure includes a gate insulating film; a work function adjusting film on the first gate insulating film; a separation film on the work function adjusting film; and an oxygen capturing film on the separation film and configured to capture oxygen introduced from the outside of the first gate structure. The oxygen capturing film is spaced apart from a top surface of the first gate insulating film by about 70 Å to about 80 Å.

公开(公告)号：US10074572B2

公开(公告)日：2018-09-11

申请号：US15491303

申请日：2017-04-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-yup Chung ,  Yoon-seok Lee ,  Hyun-jo Kim ,  Hwa-sung Rhee ,  Hee-don Jeong ,  Se-wan Park ,  Bo-cheol Jeong

IPC: H01L21/8234 ,  H01L29/06 ,  H01L27/092 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/417 ,  H01L27/108 ,  H01L21/8232 ,  H01L21/8238 ,  H01L27/088

CPC classification number: H01L21/823481 ,  H01L21/8232 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/10879 ,  H01L29/0649 ,  H01L29/0843 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/785

Abstract: An integrated circuit device includes first and second fin-type active regions having different conductive type channel regions, a first device isolation layer covering both sidewalls of the first fin-type active region, and a second device isolation layer covering both sidewalls of the second fin-type active region. The first device isolation layer and the second device isolation layer have different stack structures. To manufacture the integrated circuit device, the first device isolation layer covering both sidewalls of the first fin-type active region and the second device isolation layer covering both sidewalls of the second fin-type active region are formed after the first fin-type active region and the second fin-type active region are formed. The first device isolation layer and the second device isolation layer are formed to have different stack structure.

公开(公告)号：US09397234B2

公开(公告)日：2016-07-19

申请号：US14695428

申请日：2015-04-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-min Choi ,  Ju-youn Kim ,  Hyun-jo Kim ,  Mu-kyeng Jung

IPC: H01L29/94 ,  H01L29/51 ,  H01L29/36 ,  H01L29/49 ,  H01L29/423

CPC classification number: H01L29/94 ,  H01L29/36 ,  H01L29/42312 ,  H01L29/4966 ,  H01L29/517

Abstract: A pumping capacitor is provided. The pumping capacitor includes a substrate, a P-type gate layer on the substrate, and a gate dielectric layer between the substrate and the P-type gate layer. The substrate includes an N-type well region and an N-type doping region in the N-type well region.

Abstract translation: 提供一个泵送电容器。 泵浦电容器包括衬底，衬底上的P型栅极层以及衬底和P型栅极层之间的栅极电介质层。 衬底包括N型阱区和N型阱区中的N型掺杂区。