公开(公告)号：US10910373B2

公开(公告)日：2021-02-02

申请号：US16794029

申请日：2020-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Gun You ,  Se-wan Park ,  Baik-Min Sung ,  Bo-Cheol Jeong

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66

Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.

公开(公告)号：US20190131300A1

公开(公告)日：2019-05-02

申请号：US16233301

申请日：2018-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNG-GUN YOU ,  Se-wan Park ,  Baik-Min Sung ,  Bo-Cheol Jeong

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/06

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/7853 ,  H01L29/7854

Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.

公开(公告)号：US20200185382A1

公开(公告)日：2020-06-11

申请号：US16794029

申请日：2020-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNG-GUN YOU ,  Se-wan Park ,  Baik-Min Sung ,  Bo-Cheol Jeong

IPC: H01L27/088 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/66

Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.

公开(公告)号：US10074572B2

公开(公告)日：2018-09-11

申请号：US15491303

申请日：2017-04-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-yup Chung ,  Yoon-seok Lee ,  Hyun-jo Kim ,  Hwa-sung Rhee ,  Hee-don Jeong ,  Se-wan Park ,  Bo-cheol Jeong

IPC: H01L21/8234 ,  H01L29/06 ,  H01L27/092 ,  H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/417 ,  H01L27/108 ,  H01L21/8232 ,  H01L21/8238 ,  H01L27/088

CPC classification number: H01L21/823481 ,  H01L21/8232 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/10879 ,  H01L29/0649 ,  H01L29/0843 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/785

Abstract: An integrated circuit device includes first and second fin-type active regions having different conductive type channel regions, a first device isolation layer covering both sidewalls of the first fin-type active region, and a second device isolation layer covering both sidewalls of the second fin-type active region. The first device isolation layer and the second device isolation layer have different stack structures. To manufacture the integrated circuit device, the first device isolation layer covering both sidewalls of the first fin-type active region and the second device isolation layer covering both sidewalls of the second fin-type active region are formed after the first fin-type active region and the second fin-type active region are formed. The first device isolation layer and the second device isolation layer are formed to have different stack structure.