-
Patent Agency Ranking
1.发明公开公开(公告)号：US20240085891A1
公开(公告)日：2024-03-14
申请号：US18460934
申请日：2023-09-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jaehyun Choi
IPC: G05B19/418
CPC classification number: G05B19/41875 , G05B2219/32368
Abstract: A virtual metrology method for a wafer includes collecting log data including process path information of wafers manufactured in a semiconductor process; collecting measured values of sample wafers of which physical characteristics are measured in the semiconductor process, the sample wafers being a group of wafers selected from among the manufactured wafers; classifying measured values of the sample wafers according to process paths based on the process path information; calculating a moving average value of measured values classified for each process path; and determining a moving average value corresponding to a process path of an unmeasured target wafer from among the manufactured wafers as a predicted value of the physical characteristics of the target wafer.
-
公开(公告)号：US20230187189A1
公开(公告)日：2023-06-15
申请号：US17864541
申请日：2022-07-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Myungsub Jung , Sungyeol Kim , Sungyong Lim , Jaehyun Choi , Kyungmin Lee , Seungkyu Lim
IPC: H01J37/32 , C23C16/52 , C23C16/509
CPC classification number: H01J37/32935 , H01J37/32541 , H01J37/32568 , H01J37/32926 , C23C16/52 , C23C16/509 , H01J2237/24564 , H01J2237/3321 , H01J37/32183
Abstract: a plasma processing system includes a chamber providing a space for performing a plasma process on a substrate, a substrate stage having a seating surface for supporting the substrate, the substrate stage having a circular electrode and at least one annular electrode therein, an upper electrode provided over the substrate, a power supply configured to supply source power to the upper electrode, a first capacitance variator configured to vary a capacitance of the circular electrode based on an inputted first control signal, a second capacitance variator configured to vary a capacitance of the annular electrode based on an inputted second control signal, a sensor connected to the first and second capacitance variators respectively and configured to acquire electrical signal data of the circular electrode and the at least one annular electrode, and a controller configured to determine a thin film profile in first and second regions of the substrate corresponding to the circular electrode and the annular electrode respectively based on the electrical signal data obtained from the sensor, the controller being configured to output the first and second control signals respectively in order to obtain a desired thin film profile.
-
公开(公告)号：US20210328348A1
公开(公告)日：2021-10-21
申请号：US17364103
申请日：2021-06-30
Inventor： Yeonwoo Kim , Wonbin Hong , Junho Park , Jaehyun Choi , Sehyun Park , Sumin Yun
Abstract: An electronic device is provided. The electronic device includes a housing. The housing includes a first plate that is directed outward in a first direction, a second plate that is directed outward in a second direction opposite to the first direction, and a side member that surrounds a space between the first and second plates. The electronic device further includes a first antenna structure located in the space, wherein the first antenna structure includes a first conductive structure including a first conductive layer, which is substantially parallel to the second plate and includes a first edge extending in a third direction perpendicular to the first direction and a first notch portion disposed at the first edge, and a first conductive wall, which is substantially perpendicular to the first conductive layer and includes a second notch portion extending from the first edge and connected to the first notch portion. The electronic device further includes a second conductive structure located in the first notch portion and electrically isolated from the first conductive structure; and a third conductive structure located between the first conductive layer and the first plate and electrically isolated from the first conductive structure and the second conductive structure. The third conductive structure includes a second conductive layer facing the first conductive layer and having a quadrilateral shape, the second conductive layer including a second edge extending parallel to the first edge, a third edge extending perpendicular to the second edge, a fourth edge extending parallel to the third edge, and a fifth edge extending parallel to the second edge, wherein a distance to the fifth edge from the first conductive wall is shorter than a distance to the second edge from the first conductive wall, a second conductive wall facing the first conductive wall and extending from the second edge, a third conductive wall connected to the third edge and the second conductive wall and perpendicular to the second conductive layer and the second conductive wall, and a fourth conductive wall connected to the fourth edge and the second conductive wall and perpendicular to the second conductive layer and the second conductive wall. The electronic device further includes a wireless communication circuit electrically connected to the second conductive structure and configured to transmit or receive a signal having a frequency of 3 GHz to 100 GHz.
-
公开(公告)号：US11955731B2
公开(公告)日：2024-04-09
申请号：US17364103
申请日：2021-06-30
Inventor： Yeonwoo Kim , Wonbin Hong , Junho Park , Jaehyun Choi , Sehyun Park , Sumin Yun
CPC classification number: H01Q9/0407 , H01Q5/10 , H04B1/38
Abstract: An electronic device includes a housing including a first plate and a second plate; and a first antenna structure. The first antenna structure includes a board disposed between the first plate and the second plate. The board includes a first surface facing the first plate, a second surface facing the second plate, a plurality of insulating layers stacked on top of each other between the first surface and the second surface, a first conductive layer disposed on the first surface, a second conductive layer disposed on the second surface, a plurality of strips disposed between the plurality of insulating layers, and a plurality of vias connecting at least one or more of the first conductive layer, the second conductive layer, or the plurality of strips to each other and disposed in the plurality of insulating layers. The electronic device further includes a first conductive structure, a second conductive structure, a third conductive structure, and a fourth conductive structure formed as part of the plurality of strips and the plurality of vias; and a wireless communication circuit electrically connected to at least one of the vias and configured to transmit or receive at least one signal having a frequency of 3 GHz to 100 GHz.
-
公开(公告)号：US20250040124A1
公开(公告)日：2025-01-30
申请号：US18442274
申请日：2024-02-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongsik Kong , Sungho Jang , Junsoo Kim , Junbum Lee , Jaehyun Choi , Ilgweon Kim , Jeonghoon Oh
IPC: H10B12/00
Abstract: A gate structure includes a gate electrode on a substrate, the gate electrode including a lower portion and an upper portion sequentially stacked in a first direction substantially perpendicular to an upper surface of the substrate; a spacer structure including a second spacer and a first spacer sequentially stacked in a second direction substantially parallel to the upper surface of the substrate on a sidewall of the upper portion of the gate electrode; and a gate insulation pattern on a lower surface and a sidewall of the lower portion of the gate electrode and an outer sidewall of the spacer structure; wherein a cross-section of the first spacer has a shape of an “L”, and wherein the second spacer includes a material that is configured to induce a dipole at an interface of the first spacer and the gate insulation pattern.
-
-
-
-
Search Results
5
records
(took 0.107 seconds)
