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公开(公告)号：US09443735B2
公开(公告)日：2016-09-13
申请号：US14444037
申请日：2014-07-28
发明人： Jin Soak Kim , Gab Jin Nam , Dong Hwan Kim , Su Hwan Kim , Toshiro Nakanishi , Sung Kweon Baek , Tae Hyun An , Eun Ae Chung
IPC分类号： H01L21/336 , H01L21/762 , H01L21/28 , H01L29/51 , H01L29/66 , H01L29/78 , H01L29/49
CPC分类号： H01L21/28185 , H01L29/495 , H01L29/4966 , H01L29/518 , H01L29/66545 , H01L29/6659 , H01L29/66795 , H01L29/7833
摘要： There is provided a method of manufacturing a semiconductor device including: preparing a semiconductor substrate having an active region; forming a dielectric layer for gate insulation on the active region; forming a curing layer with a material containing germanium (Ge) on the dielectric layer; heat-treating the curing layer; and removing the curing layer. The germanium-containing material may be silicon germanium (SiGe) or germanium (Ge).
摘要翻译： 提供一种制造半导体器件的方法，包括：制备具有有源区的半导体衬底; 在所述有源区上形成用于栅极绝缘的介电层; 在介电层上形成含有锗（Ge）的材料的固化层; 热处理固化层; 并去除固化层。 含锗材料可以是硅锗（SiGe）或锗（Ge）。
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2.发明申请STATIC RANDOM ACCESS MEMORY (SRAM) CELLS INCLUDING VERTICAL CHANNEL TRANSISTORS AND METHODS OF FORMING THE SAME 有权静态随机存取存储器（SRAM），包括垂直通道晶体管及其形成方法公开(公告)号：US20150179655A1
公开(公告)日：2015-06-25
申请号：US14563695
申请日：2014-12-08
发明人： Toshiro Nakanishi , Donghwan Kim , Suhwan Kim , Yubin Kim , Jin Soak Kim , Gabjin Nam , Sungkweon Baek , Taehyun An , Eunae Chung
CPC分类号： H01L27/1104 , H01L27/281 , H01L27/283 , H01L51/0048 , H01L51/057 , H01L51/0575
摘要： A static random access memory (SRAM) cell can include a first pull-up transistor, a first pull-down transistor, a second pull-up transistor, a second pull-down transistor, a first access transistor, and a second access transistor, all being coupled together in a 6 transistor SRAM cell, wherein each of the transistors is configured as a vertical channel transistor.
摘要翻译： 静态随机存取存储器（SRAM）单元可以包括第一上拉晶体管，第一下拉晶体管，第二上拉晶体管，第二下拉晶体管，第一存取晶体管和第二存取晶体管， 全部在6晶体管SRAM单元中耦合在一起，其中每个晶体管被配置为垂直沟道晶体管。
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公开(公告)号：US09997523B2
公开(公告)日：2018-06-12
申请号：US15631308
申请日：2017-06-23
发明人： Toshiro Nakanishi , Donghwan Kim , Suhwan Kim , Yubin Kim , Jin Soak Kim , Gabjin Nam , Sungkweon Baek , Taehyun An , Eunae Chung
CPC分类号： H01L27/1104 , H01L27/281 , H01L27/283 , H01L51/0048 , H01L51/057 , H01L51/0575
摘要： A static random access memory (SRAM) cell can include a first pull-up transistor, a first pull-down transistor, a second pull-up transistor, a second pull-down transistor, a first access transistor, and a second access transistor, all being coupled together in a 6 transistor SRAM cell, wherein each of the transistors is configured as a vertical channel transistor.
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4.发明申请公开(公告)号：US20170294441A1
公开(公告)日：2017-10-12
申请号：US15631308
申请日：2017-06-23
发明人： Toshiro Nakanishi , Donghwan Kim , Suhwan Kim , Yubin Kim , Jin Soak Kim , Gabjin Nam , Sungkweon Baek , Taehyun An , Eunae Chung
CPC分类号： H01L27/1104 , H01L27/281 , H01L27/283 , H01L51/0048 , H01L51/057 , H01L51/0575
摘要： A static random access memory (SRAM) cell can include a first pull-up transistor, a first pull-down transistor, a second pull-up transistor, a second pull-down transistor, a first access transistor, and a second access transistor, all being coupled together in a 6 transistor SRAM cell, wherein each of the transistors is configured as a vertical channel transistor.
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公开(公告)号：US09721957B2
公开(公告)日：2017-08-01
申请号：US14563695
申请日：2014-12-08
发明人： Toshiro Nakanishi , Donghwan Kim , Suhwan Kim , Yubin Kim , Jin Soak Kim , Gabjin Nam , Sungkweon Baek , Taehyun An , Eunae Chung
CPC分类号： H01L27/1104 , H01L27/281 , H01L27/283 , H01L51/0048 , H01L51/057 , H01L51/0575
摘要： A static random access memory (SRAM) cell can include a first pull-up transistor, a first pull-down transistor, a second pull-up transistor, a second pull-down transistor, a first access transistor, and a second access transistor, all being coupled together in a 6 transistor SRAM cell, wherein each of the transistors is configured as a vertical channel transistor.
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公开(公告)号：US20150132937A1
公开(公告)日：2015-05-14
申请号：US14444037
申请日：2014-07-28
发明人： Jin Soak Kim , Gab Jin Nam , Dong Hwan Kim , Su Hwan Kim , Toshiro Nakanishi , Sung Kweon Baek , Tae Hyun An , Eun Ae Chung
IPC分类号： H01L21/28
CPC分类号： H01L21/28185 , H01L29/495 , H01L29/4966 , H01L29/518 , H01L29/66545 , H01L29/6659 , H01L29/66795 , H01L29/7833
摘要： There is provided a method of manufacturing a semiconductor device including: preparing a semiconductor substrate having an active region; forming a dielectric layer for gate insulation on the active region; forming a curing layer with a material containing germanium (Ge) on the dielectric layer; heat-treating the curing layer; and removing the curing layer. The germanium-containing material may be silicon germanium (SiGe) or germanium (Ge).
摘要翻译： 提供一种制造半导体器件的方法，包括：制备具有有源区的半导体衬底; 在所述有源区上形成用于栅极绝缘的介电层; 在介电层上形成含有锗（Ge）的材料的固化层; 热处理固化层; 并去除固化层。 含锗材料可以是硅锗（SiGe）或锗（Ge）。
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