DEVICE FOR MANUFACTURING A SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME

    公开(公告)号:US20230212749A1

    公开(公告)日:2023-07-06

    申请号:US18060861

    申请日:2022-12-01

    IPC分类号: C23C16/455 C23C16/52

    摘要: A device for manufacturing a semiconductor device is provided. The device for manufacturing a semiconductor device includes a tube extending in a first direction, and defining a reaction space therein and configured to accommodate a boat that is configured to receive a plurality of substrates therein, and first and second nozzles each extending in the first direction inside the tube, and being apart from each other on a plane that is perpendicular to the first direction and parallel to upper surfaces of the substrates, wherein the first and second nozzles include a plurality of first injection ports and a plurality of first second injection ports that are configured inject different gases toward a center of the reaction space, respectively, and a plurality of second injection ports are placed in a region between a corresponding pair of adjacent ones of the plurality of first injection ports along the first direction.

    Amplitude shift keying demodulator and communication apparatus including the same
    7.
    发明授权
    Amplitude shift keying demodulator and communication apparatus including the same 有权
    幅移键控解调器和包括它的通信设备

    公开(公告)号:US09215117B2

    公开(公告)日:2015-12-15

    申请号:US14599729

    申请日:2015-01-19

    IPC分类号: H04B1/38 H04L27/06 H04L7/04

    CPC分类号: H04L27/06

    摘要: An amplitude shift keying (ASK) demodulator and a communication apparatus including the same are provided. The ASK demodulator includes an envelope detector, a clock generator, a plurality of elementary demodulators, and a post signal processor. The envelope detector is configured to detect an envelope of an ASK modulated signal and to generate an envelope signal. The clock generator is configured to generate a main clock signal and first through n-th clock signals, where n is a positive integer of at least 2. The plurality of elementary demodulators are each configured to sample the envelope signal using a first sampling clock signal and a second sampling clock signal, and to output first through n-th elementary demodulated signals based on a difference between the sampled envelope signals using the first sampling clock signal and the second sampling clock signal. The post signal processor is configured to generate a final demodulated signal using at least one of the first through n-th elementary demodulated signals.

    摘要翻译: 提供了一种幅度键控(ASK)解调器和包括该解调器的通信装置。 ASK解调器包括包络检测器,时钟发生器,多个基本解调器和后置信号处理器。 包络检测器被配置为检测ASK调制信号的包络并产生包络信号。 时钟发生器被配置为产生主时钟信号和第一至第n时钟信号,其中n是至少为2的正整数。多个基本解调器被配置为使用第一采样时钟信号对包络信号进行采样 以及第二采样时钟信号,并且基于使用第一采样时钟信号和第二采样时钟信号的采样包络信号之间的差来输出第一到第n个基本解调信号。 后信号处理器被配置为使用第一到第n个基本解调信号中的至少一个来产生最终解调信号。