VERTICAL MEMORY DEVICE
    1.
    发明申请

    公开(公告)号:US20220399401A1

    公开(公告)日:2022-12-15

    申请号:US17826944

    申请日:2022-05-27

    Abstract: A memory device including a first substrate extending in a first direction and a second direction perpendicular to the first direction, the first substrate including a memory cell region and a first peripheral circuit region, and a second substrate, including a second peripheral circuit region, extending in the first and second direction, the second substrate overlapping the first substrate in a third direction perpendicular to the first and second direction. The memory device also including a memory cell array disposed in the memory cell region and including a plurality of vertical channel structures extending in the third direction, a peripheral circuit disposed in the second peripheral circuit region, and a resistor extending in the third direction through the first peripheral circuit region and the second peripheral circuit region. The resistor including a plurality of resistance contact structures overlapping the plurality of vertical channel structures in the first direction.

    Voltage generator and memory device including the same

    公开(公告)号:US11386967B2

    公开(公告)日:2022-07-12

    申请号:US17217346

    申请日:2021-03-30

    Abstract: A memory device including a memory cell area having a plurality of memory cells, and a peripheral circuit area including peripheral circuits configured to control the memory cells, the peripheral circuits connected to the memory cells by at least a portion of bit lines, word lines, and select lines may be provided. The peripheral circuits may include a reference voltage generator configured to output at least one reference voltage in response to control data of a control logic. The reference voltage generator may include a first resistor chain including first resistors connected in series between a first power node and a second power node, a second resistor chain including second resistors connected in series between the first power node and the second power node, and a plurality of decoders connected to the first resistor chain and the second resistor chain.

    Electronic circuit including charge pump for converting voltage

    公开(公告)号:US10707751B2

    公开(公告)日:2020-07-07

    申请号:US16550191

    申请日:2019-08-24

    Abstract: An electronic circuit includes a first switch circuit, a second switch circuit, a pumping circuit, and a main charge pump. The first switch circuit transfers a first driving voltage to a first node based on a first clock. The second switch circuit transfers a second driving voltage to a second node based on the first driving voltage of the first node. The pumping circuit outputs a pumping voltage having a level corresponding to a sum of a level of the second driving voltage and a first operation level of a second clock, based on the second driving voltage of the second node and the first operation level. The main charge pump converts an input voltage based on the pumping voltage.

    NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME, EXTERNAL POWER CONTROLLING METHOD THEREOF
    5.
    发明申请
    NONVOLATILE MEMORY DEVICE, MEMORY SYSTEM HAVING THE SAME, EXTERNAL POWER CONTROLLING METHOD THEREOF 审中-公开
    非易失性存储器件,具有该存储器件的存储器系统,其外部功率控制方法

    公开(公告)号:US20150364204A1

    公开(公告)日:2015-12-17

    申请号:US14835230

    申请日:2015-08-25

    CPC classification number: G11C16/30 G11C16/0483 G11C16/12

    Abstract: An external power control method includes determining whether to apply a second external voltage to a first node according to a drop of a first external voltage; generating a flag signal according to a drop of the second external voltage when the second external voltage is applied to the first node; transferring a voltage of the first node to a second node in response to the flag signal; and discharging at least one voltage of an internal circuit connected to the second node in response to the flag signal.

    Abstract translation: 外部功率控制方法包括根据第一外部电压的下降来确定是否向第一节点施加第二外部电压; 当第二外部电压施加到第一节点时,根据第二外部电压的下降产生标志信号; 响应于所述标志信号将所述第一节点的电压传送到第二节点; 以及响应于所述标志信号,放电连接到所述第二节点的内部电路的至少一个电压。

    Nonvolatile memory device, memory system having the same, external power controlling method thereof
    6.
    发明授权
    Nonvolatile memory device, memory system having the same, external power controlling method thereof 有权
    非易失性存储器件,具有相同的存储器系统,其外部功率控制方法

    公开(公告)号:US09147488B2

    公开(公告)日:2015-09-29

    申请号:US14061019

    申请日:2013-10-23

    CPC classification number: G11C16/30 G11C16/0483 G11C16/12

    Abstract: An external power control method includes determining whether to apply a second external voltage to a first node according to a drop of a first external voltage; generating a flag signal according to a drop of the second external voltage when the second external voltage is applied to the first node; transferring a voltage of the first node to a second node in response to the flag signal; and discharging at least one voltage of an internal circuit connected to the second node in response to the flag signal.

    Abstract translation: 外部功率控制方法包括根据第一外部电压的下降来确定是否向第一节点施加第二外部电压; 当第二外部电压施加到第一节点时,根据第二外部电压的下降产生标志信号; 响应于所述标志信号将所述第一节点的电压传送到第二节点; 以及响应于所述标志信号,放电连接到所述第二节点的内部电路的至少一个电压。

    Nonvolatile memory device and memory system including the same
    7.
    发明授权
    Nonvolatile memory device and memory system including the same 有权
    非易失性存储器件和包括其的存储器系统

    公开(公告)号:US09076511B2

    公开(公告)日:2015-07-07

    申请号:US14087444

    申请日:2013-11-22

    CPC classification number: G11C5/147 G11C5/145 G11C16/06 G11C16/30

    Abstract: A nonvolatile memory device includes a memory cell array; and a high voltage generator arranged to generate a high voltage to be supplied to the memory cell array. The high voltage generator includes a pump unit block having a plurality of pump units supplied with an external voltage and at least one of the pumps is engaged in pumping the external voltage to a higher, output, voltage, at a steady clock rate. The number of pumps engaged in pumping is increased until a predetermined period has elapsed. The rate at which the number of pumps is increased depends upon the value of the external voltage.

    Abstract translation: 非易失性存储器件包括存储单元阵列; 以及高电压发生器,其布置成产生要提供给存储单元阵列的高电压。 高压发生器包括具有供给外部电压的多个泵单元的泵单元块,并且至少一个泵接合以以稳定的时钟速率将外部电压泵送到更高的输出电压。 泵送的泵的数量增加直到经过了预定时间。 泵数量增加的速率取决于外部电压的值。

    NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
    8.
    发明申请
    NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME 有权
    非易失性存储器件和包括其的存储器系统

    公开(公告)号:US20140233337A1

    公开(公告)日:2014-08-21

    申请号:US14087444

    申请日:2013-11-22

    CPC classification number: G11C5/147 G11C5/145 G11C16/06 G11C16/30

    Abstract: A nonvolatile memory device includes a memory cell array; and a high voltage generator arranged to generate a high voltage to be supplied to the memory cell array. The high voltage generator includes a pump unit block having a plurality of pump units supplied with an external voltage and at least one of the pumps is engaged in pumping the external voltage to a higher, output, voltage, at a steady clock rate. The number of pumps engaged in pumping is increased until a predetermined period has elapsed. The rate at which the number of pumps is increased depends upon the value of the external voltage.

    Abstract translation: 非易失性存储器件包括存储单元阵列; 以及高电压发生器,其布置成产生要提供给存储单元阵列的高电压。 高压发生器包括具有供给外部电压的多个泵单元的泵单元块,并且至少一个泵接合以以稳定的时钟速率将外部电压泵送到更高的输出电压。 泵送的泵的数量增加直到经过了预定时间。 泵数量增加的速率取决于外部电压的值。

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