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公开(公告)号:US20200066666A1
公开(公告)日:2020-02-27
申请号:US16668146
申请日:2019-10-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeong-gi Jin , Nae-in Lee , Jum-yong Park , Jin-ho Chun , Seong-min Son , Ho-jin Lee
Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.
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公开(公告)号:US11798906B2
公开(公告)日:2023-10-24
申请号:US17551548
申请日:2021-12-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeong-gi Jin , Nae-in Lee , Jum-yong Park , Jin-ho Chun , Seong-min Son , Ho-Jin Lee
IPC: H01L23/00 , H01L23/31 , H01L25/10 , H01L25/065
CPC classification number: H01L24/05 , H01L23/3157 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L25/0657 , H01L25/105 , H01L2224/0221 , H01L2224/02126 , H01L2224/02206 , H01L2224/02215 , H01L2224/02335 , H01L2224/0401 , H01L2224/05025 , H01L2224/05564 , H01L2224/11849 , H01L2224/13013 , H01L2224/13025 , H01L2224/13026 , H01L2224/13101 , H01L2224/13144 , H01L2224/13147 , H01L2224/1403 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81815 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06565 , H01L2225/06572 , H01L2225/1023 , H01L2225/1058 , H01L2924/10253 , H01L2924/1432 , H01L2924/1434 , H01L2924/1438 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/3511 , H01L2224/13101 , H01L2924/014 , H01L2924/00014 , H01L2224/13144 , H01L2924/00014 , H01L2224/13147 , H01L2924/00014 , H01L2924/181 , H01L2924/00012 , H01L2224/73204 , H01L2224/16225 , H01L2224/32225 , H01L2924/00
Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.
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公开(公告)号:US11251144B2
公开(公告)日:2022-02-15
申请号:US16668146
申请日:2019-10-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeong-gi Jin , Nae-in Lee , Jum-yong Park , Jin-ho Chun , Seong-min Son , Ho-jin Lee
IPC: H01L23/00 , H01L23/31 , H01L25/10 , H01L25/065
Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.
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公开(公告)号:US10483224B2
公开(公告)日:2019-11-19
申请号:US15791709
申请日:2017-10-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeong-gi Jin , Nae-in Lee , Jum-yong Park , Jin-ho Chun , Seong-min Son , Ho-jin Lee
IPC: H01L23/00 , H01L23/31 , H01L25/065 , H01L25/10
Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.
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公开(公告)号:US20180138137A1
公开(公告)日:2018-05-17
申请号:US15791709
申请日:2017-10-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeong-gi JIN , Nae-in Lee , Jum-yong Park , Jin-ho Chun , Seong-min Son , Ho-jin Lee
IPC: H01L23/00 , H01L25/065
CPC classification number: H01L24/05 , H01L23/3157 , H01L24/02 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L25/0657 , H01L25/105 , H01L2224/02126 , H01L2224/02206 , H01L2224/0221 , H01L2224/02215 , H01L2224/02335 , H01L2224/0401 , H01L2224/05025 , H01L2224/05564 , H01L2224/11849 , H01L2224/13013 , H01L2224/13025 , H01L2224/13026 , H01L2224/13101 , H01L2224/13144 , H01L2224/13147 , H01L2224/1403 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81815 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06565 , H01L2225/06572 , H01L2225/1023 , H01L2225/1058 , H01L2924/10253 , H01L2924/1432 , H01L2924/1434 , H01L2924/1438 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/3511 , H01L2924/014 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.
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