公开(公告)号：US20200066666A1

公开(公告)日：2020-02-27

申请号：US16668146

申请日：2019-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-gi Jin ,  Nae-in Lee ,  Jum-yong Park ,  Jin-ho Chun ,  Seong-min Son ,  Ho-jin Lee

IPC: H01L23/00 ,  H01L23/31

Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.

公开(公告)号：US09496218B2

公开(公告)日：2016-11-15

申请号：US13919580

申请日：2013-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do-Sun Lee ,  Kun-Sang Park ,  Byung-Lyul Park ,  Seong-min Son ,  Gil-heyun Choi

IPC: H01L23/522 ,  H01L23/48 ,  H01L21/768 ,  H01L21/288 ,  H01L23/498 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L23/5226 ,  H01L21/2885 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/13 ,  H01L2224/16146 ,  H01L2224/73104 ,  H01L2924/13091 ,  H01L2924/1461 ,  H01L2924/00

Abstract: An integrated circuit device including a through-silicon-via (TSV) structure and methods of manufacturing the same are provided. The integrated circuit device may include the TSV structure penetrating through a semiconductor structure. The TSV structure may include a first through electrode unit including impurities of a first concentration and a second through electrode unit including impurities of a second concentration greater than the first concentration.

Abstract translation: 提供了一种包括贯穿硅通孔（TSV）结构的集成电路器件及其制造方法。 集成电路器件可以包括穿透半导体结构的TSV结构。 TSV结构可以包括包括第一浓度的杂质的第一通过电极单元和包括大于第一浓度的第二浓度的杂质的第二通过电极单元。

公开(公告)号：US11798906B2

公开(公告)日：2023-10-24

申请号：US17551548

申请日：2021-12-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-gi Jin ,  Nae-in Lee ,  Jum-yong Park ,  Jin-ho Chun ,  Seong-min Son ,  Ho-Jin Lee

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/10 ,  H01L25/065

CPC classification number: H01L24/05 ,  H01L23/3157 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0221 ,  H01L2224/02126 ,  H01L2224/02206 ,  H01L2224/02215 ,  H01L2224/02335 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05564 ,  H01L2224/11849 ,  H01L2224/13013 ,  H01L2224/13025 ,  H01L2224/13026 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/13101 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/13144 ,  H01L2924/00014 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00

Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.

公开(公告)号：US20140138819A1

公开(公告)日：2014-05-22

申请号：US14074573

申请日：2013-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-il Choi ,  Su-kyung Kim ,  Kun-sang Park ,  Seong-min Son ,  Jin-ho An ,  Do-sun Lee

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/02107 ,  H01L21/76898 ,  H01L23/3135 ,  H01L24/05 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05569 ,  H01L2224/0557 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2224/05552 ,  H01L2924/00

Abstract: Provided are a semiconductor device, a method of manufacturing the same, and a semiconductor package including the same. The semiconductor device includes: a substrate having a recess region in a predetermined portion of a back side of the substrate; a wiring part disposed on a front side of the substrate and including at least one wiring layer; an insulating layer disposed on the back side of the substrate and including a first portion filling in the recess region and a second portion covering the back side of the substrate of a non-recess region other than the recess region; and a through silicon via (TSV) provided in plurality of and penetrating the first portion to be electrically connected to the at least one wiring layer.

Abstract translation: 提供半导体器件，其制造方法和包括该半导体器件的半导体封装。 半导体器件包括：衬底，其在衬底的背面的预定部分中具有凹陷区域; 布线部，其布置在所述基板的前侧，并且包括至少一个布线层; 绝缘层，设置在所述基板的背面，并且包括填充在所述凹部区域中的第一部分和覆盖所述基板的背面以外的除了所述凹部区域之外的非凹部区域的第二部分; 以及设置在多个并穿透所述第一部分以与所述至少一个布线层电连接的贯通硅通孔（TSV）。

公开(公告)号：US11251144B2

公开(公告)日：2022-02-15

申请号：US16668146

申请日：2019-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-gi Jin ,  Nae-in Lee ,  Jum-yong Park ,  Jin-ho Chun ,  Seong-min Son ,  Ho-jin Lee

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/10 ,  H01L25/065

Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.

公开(公告)号：US10483224B2

公开(公告)日：2019-11-19

申请号：US15791709

申请日：2017-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-gi Jin ,  Nae-in Lee ,  Jum-yong Park ,  Jin-ho Chun ,  Seong-min Son ,  Ho-jin Lee

IPC: H01L23/00 ,  H01L23/31 ,  H01L25/065 ,  H01L25/10

Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.

公开(公告)号：US20180138137A1

公开(公告)日：2018-05-17

申请号：US15791709

申请日：2017-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-gi JIN ,  Nae-in Lee ,  Jum-yong Park ,  Jin-ho Chun ,  Seong-min Son ,  Ho-jin Lee

IPC: H01L23/00 ,  H01L25/065

CPC classification number: H01L24/05 ,  H01L23/3157 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/02126 ,  H01L2224/02206 ,  H01L2224/0221 ,  H01L2224/02215 ,  H01L2224/02335 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/05564 ,  H01L2224/11849 ,  H01L2224/13013 ,  H01L2224/13025 ,  H01L2224/13026 ,  H01L2224/13101 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/10253 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/1438 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor chip includes a semiconductor substrate including a bump region and a non-bump region, a bump on the bump region, and a passivation layer on the bump region and the non-bump region of the semiconductor substrate. No bump is on the non-bump region. A thickness of the passivation layer in the bump region is thicker than a thickness of the passivation layer in the non-bump region. The passivation layer includes a step between the bump region and the non-bump region.