公开(公告)号：US20240427405A1

公开(公告)日：2024-12-26

申请号：US18749071

申请日：2024-06-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungsoo LEE ,  Sooyong KIM ,  Younghoon LEE ,  Jongjin LEE ,  Junho HUH

IPC: G06F1/324

Abstract: A Dynamic Voltage and Frequency Scaling (DVFS) controller, an integrated circuit including DVFS, and a method of operating the DVFS controller are provided. The integrated circuit includes at least one subblock circuit configured to process an instruction, and a DVFS controller configured to control a power management unit (PMU) and a clock management unit (CMU) to control an operating voltage and an operating frequency, respectively, based on a resonance frequency calculated from a frequency response resulting from dynamic characteristics of an entire power system including the PMU, a power delivery network (PDN), and the subblock circuit.

公开(公告)号：US20220155807A1

公开(公告)日：2022-05-19

申请号：US17665907

申请日：2022-02-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minshik SEOK ,  Younghoon LEE ,  Kyungrae KIM ,  Kyungsoo LEE ,  Junho HUH

IPC: G05F1/56 ,  G06F1/26

Abstract: Multiple power management integrated circuits (PMICs) may perform communication and power sequence operation coordination between the multiple PMICs through a communication interface connected to two signal lines using a dual pin interface. The multiple PMICs include a main PMIC configured to communicate with at least one application processor through a system interface and at least one sub-PMIC configured to communicate with the main PMIC through the communication interface. A first signal line uses a single bidirectional signaling scheme, and a power status signal PSTATUS is exchanged between the main PMIC and the at least one sub-PMIC through the first signal line. A second signal line uses a single unidirectional signaling scheme, and a power sequence control signal PIF is transmitted from the main PMIC to the at least one sub-PMIC through the second signal line.

公开(公告)号：US20240371718A1

公开(公告)日：2024-11-07

申请号：US18507369

申请日：2023-11-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daehan YOUN ,  Youngsang CHO ,  Kyoung-Min LEE ,  Junho HUH

IPC: H01L23/36 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498 ,  H01L25/065

Abstract: A semiconductor package includes a first package substrate including a first redistribution layer, at least one semiconductor chip disposed on the first redistribution layer and including a semiconductor device, and a second package substrate disposed on the at least one semiconductor chip and including a second redistribution layer. The at least one semiconductor chip includes at least one heat dissipation via having one end adjacent to the semiconductor device and penetrating through at least a portion of the at least one semiconductor chip, and another end contacting the second package substrate. The at least one heat dissipation via is a dissipation path of heat generated from the semiconductor device.

公开(公告)号：US20210271276A1

公开(公告)日：2021-09-02

申请号：US17027946

申请日：2020-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minshik SEOK ,  Younghoon LEE ,  Kyungrae KIM ,  Kyungsoo LEE ,  Junho HUH

IPC: G05F1/56

Abstract: Multiple power management integrated circuits (PMICs) may perform communication and power sequence operation coordination between the multiple PMICs through a communication interface connected to two signal lines using a dual pin interface. The multiple PMICs include a main PMIC configured to communicate with at least one application processor through a system interface and at least one sub-PMIC configured to communicate with the main PMIC through the communication interface. A first signal line uses a single bidirectional signaling scheme, and a power status signal PSTATUS is exchanged between the main PMIC and the at least one sub-PMIC through the first signal line. A second signal line uses a single unidirectional signaling scheme, and a power sequence control signal PIF is transmitted from the main PMIC to the at least one sub-PMIC through the second signal line.

公开(公告)号：US20200372144A1

公开(公告)日：2020-11-26

申请号：US16959834

申请日：2019-01-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junho HUH

IPC: G06F21/36 ,  G06F3/0488

Abstract: An electronic apparatus is disclosed. The electronic apparatus includes a display, and a processor configured to, based on a user command for setting unlocking information being input, display a screen including a word on the display, and store information on an object drawn on the screen by a user's gesture as the unlocking information, wherein the word is configured to induce an object related to the word to be drawn on the screen.

公开(公告)号：US20240136255A1

公开(公告)日：2024-04-25

申请号：US18456865

申请日：2023-08-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bongwee YU ,  Junho HUH

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/481 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2225/06541 ,  H01L2924/381

Abstract: An integrated circuit device including a first semiconductor chip, a plurality of signal through silicon vias (TSV), a second semiconductor chip, a plurality of signal bumps and an interposer may be provided. The signal TSVs may be in the first semiconductor chip by a first pitch. The second semiconductor chip may be on the first semiconductor chip. The signal bumps may be on a lower surface of the second semiconductor chip by a second pitch wider than the first pitch. The interposer may be interposed between the first semiconductor chip and the second semiconductor chip and may be electrically connecting the signal TSVs with the signal bumps. Thus, an occupying area of the signal TSVs in the first semiconductor chip may be decreased so that the integrated circuit device may have a smaller size.

公开(公告)号：US20240038157A1

公开(公告)日：2024-02-01

申请号：US18351177

申请日：2023-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changju LEE ,  Kyounghwan KWON ,  Junho HUH

IPC: G09G3/3225

CPC classification number: G09G3/3225 ,  G09G2320/0247 ,  G09G2330/023 ,  G09G2310/08

Abstract: A display system includes a host configured to transfer image data respectively corresponding to a plurality of frames through a main channel, and to transfer a synchronization signal that synchronizes a clock signal of the host with a clock signal of the display driving circuit through an auxiliary channel, a display panel configured to display the image data, and a display driving circuit configured to generate control signals driving the display panel, based on the synchronization signal received through the auxiliary channel. The host is configured to transfer the synchronization signal including a first synchronization signal and a second synchronization signal that is different from the first synchronization signal, to the display driving circuit, through the auxiliary channel.

公开(公告)号：US20210306135A1

公开(公告)日：2021-09-30

申请号：US17082790

申请日：2020-10-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Younsung CHU ,  Junho HUH

IPC: H04L9/00 ,  H04L9/06 ,  H04L9/32

Abstract: An electronic device of a first domain, which is a blockchain-based public key infrastructure (PKI) domain, includes: an interface configured to receive, from a first entity belonging to a second domain which is a certification authority (CA)-based PKI domain, a first certificate of the first entity and a second certificate of a second entity, wherein the second entity is an upper node of the first entity and is a node of a blockchain; a memory configured to store the first certificate and the second certificate; and a processor configured to look up a transaction corresponding to the second entity at a distributed ledger of the first domain based on an identifier of the second entity, verify the second certificate based on the transaction, and verify the first certificate based on the second certificate.

公开(公告)号：US20210176075A1

公开(公告)日：2021-06-10

申请号：US16923521

申请日：2020-07-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younsung CHU ,  Junho HUH

IPC: H04L9/32 ,  H04L9/06

Abstract: A cryptographic communication system includes an electronic device configured to output a certificate and a transaction including a first hash value in which a certificate is hashed certificate, and a node configured to first determine whether the electronic device generated the transaction based on the transaction and the certificate, to second determine whether information included in the transaction and information included in the certificate coincide, and to third add a block to a distributed ledger depending on the result of the first determining and the second determining. The block includes the transaction, and the electronic device is configured to generate the certificate such that the certificate includes an ID of the electronic device and a public key of the electronic device.

公开(公告)号：US20250105223A1

公开(公告)日：2025-03-27

申请号：US18773012

申请日：2024-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwook HAN ,  Kyoungmin LEE ,  Kyungsoo LEE ,  Junho HUH

IPC: H01L25/10 ,  H01L25/065 ,  H03F3/24 ,  H05K1/18

Abstract: A radio frequency communication device may include a first package including a first semiconductor chip, the first semiconductor chip including a reception amplifier configured to receive a radio frequency (RF) signal, amplify the received RF signal, and output the amplified RF signal, a second package including a second semiconductor chip and a third semiconductor chip, the second semiconductor chip including a reception chain configured to receive the amplified RF signal from the first semiconductor chip via at least one first wire on a printed circuit board (PCB), and generate a baseband digital signal, and the third semiconductor chip being configured to receive the baseband digital signal from the second semiconductor chip via an internal transmission of the second package, and process the baseband digital signal, and the PCB on which the first package and the second package are mounted.