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公开(公告)号:US09653572B2
公开(公告)日:2017-05-16
申请号:US14806304
申请日:2015-07-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seon-Ah Nam , Sung-Hoon Kim , Il-Ryong Kim , Kwang-You Seo , Kwang-Yong Jang
IPC: H01L21/3213 , H01L29/66 , H01L21/321 , H01L29/51 , H01L29/78 , H01L29/165
CPC classification number: H01L29/66545 , H01L21/32105 , H01L21/32134 , H01L21/32139 , H01L29/165 , H01L29/513 , H01L29/517 , H01L29/66553 , H01L29/66636 , H01L29/66795 , H01L29/7848
Abstract: A method of fabricating a semiconductor device includes forming a dummy gate on a substrate, forming a dummy gate mask on the dummy gate, forming a gate spacer on the substrate, the gate spacer covering at least one sidewall surface of the dummy gate and the dummy gate mask, forming a recess on at least one side of the dummy gate by etching the substrate, and forming an epitaxial layer in the recess using an epitaxial growth process. The forming of the dummy gate mask includes forming an oxide layer and a dummy gate mask layer on the dummy gate.
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公开(公告)号:US09324716B2
公开(公告)日:2016-04-26
申请号:US13832599
申请日:2013-03-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ju-Youn Kim , Kwang-You Seo
IPC: H01L21/76 , H01L29/78 , H01L27/092 , H01L29/423 , H01L29/49 , H01L21/8238 , H01L29/66
CPC classification number: H01L27/092 , H01L21/823821 , H01L21/823842 , H01L21/82385 , H01L27/0886 , H01L27/0922 , H01L27/0924 , H01L29/0649 , H01L29/4236 , H01L29/42376 , H01L29/4966 , H01L29/66545 , H01L29/78 , H01L29/7856
Abstract: A semiconductor device includes an interlayer insulating film formed on a substrate and including a trench, a gate insulating film formed in the trench, a work function adjusting film formed on the gate insulating film in the trench along sidewalls and a bottom surface of the trench, and including an inclined surface having an acute angle with respect to the sidewalls of the trench, and a metal gate pattern formed on the work function adjusting film in the trench to fill up the trench.
Abstract translation: 半导体器件包括形成在衬底上并且包括沟槽的层间绝缘膜,形成在沟槽中的栅极绝缘膜,形成在沟槽中的栅极绝缘膜上的功能调节膜,沿沟槽的侧壁和底表面, 并且包括相对于沟槽的侧壁具有锐角的倾斜表面,以及形成在沟槽中的功函数调节膜上以填充沟槽的金属栅极图案。
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公开(公告)号:US09099336B2
公开(公告)日:2015-08-04
申请号:US13834488
申请日:2013-03-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Tae-Won Ha , Suk-Hoon Kim , Ju-Youn Kim , Kwang-You Seo , Jong-Mil Youn
IPC: H01L27/092 , H01L29/78 , H01L21/8238 , H01L29/49 , H01L29/51 , H01L29/10
CPC classification number: H01L27/092 , H01L21/823807 , H01L21/823842 , H01L29/1054 , H01L29/4958 , H01L29/517 , H01L29/78 , H01L29/7833
Abstract: A semiconductor device using a high-k dielectric film is provided. The semiconductor device comprises a first gate insulating layer on a substrate and a first barrier layer on the first gate insulating layer, the first barrier layer having a first thickness. A first work function control layer is on the first barrier layer. A second barrier layer is present on the first work function control layer, the second barrier layer having a second thickness that is less than the first thickness.
Abstract translation: 提供了使用高k电介质膜的半导体器件。 半导体器件包括衬底上的第一栅极绝缘层和第一栅极绝缘层上的第一势垒层,第一势垒层具有第一厚度。 第一功能控制层位于第一阻挡层上。 第二阻挡层存在于第一功函数控制层上,第二阻挡层具有小于第一厚度的第二厚度。
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公开(公告)号:US09627380B2
公开(公告)日:2017-04-18
申请号:US14831892
申请日:2015-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ju-Youn Kim , Kwang-You Seo
IPC: H01L21/76 , H01L29/78 , H01L21/28 , H01L21/33 , H01L27/092 , H01L27/088 , H01L29/06 , H01L29/423 , H01L29/49 , H01L21/8238 , H01L29/66
CPC classification number: H01L27/092 , H01L21/823821 , H01L21/823842 , H01L21/82385 , H01L27/0886 , H01L27/0922 , H01L27/0924 , H01L29/0649 , H01L29/4236 , H01L29/42376 , H01L29/4966 , H01L29/66545 , H01L29/78 , H01L29/7856
Abstract: A semiconductor device includes an interlayer insulating film formed on a substrate and including a trench, a gate insulating film formed in the trench, a work function adjusting film formed on the gate insulating film in the trench along sidewalls and a bottom surface of the trench, and including an inclined surface having an acute angle with respect to the sidewalls of the trench, and a metal gate pattern formed on the work function adjusting film in the trench to fill up the trench.
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公开(公告)号:US20140239405A1
公开(公告)日:2014-08-28
申请号:US13834488
申请日:2013-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Tae-Won Ha , Suk-Hoon Kim , Ju-Youn Kim , Kwang-You Seo , Jong-Mil Youn
IPC: H01L27/092 , H01L29/78
CPC classification number: H01L27/092 , H01L21/823807 , H01L21/823842 , H01L29/1054 , H01L29/4958 , H01L29/517 , H01L29/78 , H01L29/7833
Abstract: A semiconductor device using a high-k dielectric film is provided. The semiconductor device comprises a first gate insulating layer on a substrate and a first barrier layer on the first gate insulating layer, the first barrier layer having a first thickness. A first work function control layer is on the first barrier layer. A second barrier layer is present on the first work function control layer, the second barrier layer having a second thickness that is less than the first thickness.
Abstract translation: 提供了使用高k电介质膜的半导体器件。 半导体器件包括衬底上的第一栅极绝缘层和第一栅极绝缘层上的第一势垒层,第一势垒层具有第一厚度。 第一功能控制层位于第一阻挡层上。 第二阻挡层存在于第一功函数控制层上,第二阻挡层具有小于第一厚度的第二厚度。
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公开(公告)号:US20150364473A1
公开(公告)日:2015-12-17
申请号:US14831892
申请日:2015-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ju-Youn Kim , Kwang-You Seo
IPC: H01L27/092 , H01L29/423 , H01L29/49
CPC classification number: H01L27/092 , H01L21/823821 , H01L21/823842 , H01L21/82385 , H01L27/0886 , H01L27/0922 , H01L27/0924 , H01L29/0649 , H01L29/4236 , H01L29/42376 , H01L29/4966 , H01L29/66545 , H01L29/78 , H01L29/7856
Abstract: A semiconductor device includes an interlayer insulating film formed on a substrate and including a trench, a gate insulating film formed in the trench, a work function adjusting film formed on the gate insulating film in the trench along sidewalls and a bottom surface of the trench, and including an inclined surface having an acute angle with respect to the sidewalls of the trench, and a metal gate pattern formed on the work function adjusting film in the trench to fill up the trench.
Abstract translation: 半导体器件包括形成在衬底上并且包括沟槽的层间绝缘膜,形成在沟槽中的栅极绝缘膜,形成在沟槽中的栅极绝缘膜上的功能调节膜,沿沟槽的侧壁和底表面, 并且包括相对于沟槽的侧壁具有锐角的倾斜表面,以及形成在沟槽中的功函数调节膜上以填充沟槽的金属栅极图案。
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公开(公告)号:US20130299918A1
公开(公告)日:2013-11-14
申请号:US13832599
申请日:2013-03-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ju-Youn Kim , Kwang-You Seo
IPC: H01L29/78
CPC classification number: H01L27/092 , H01L21/823821 , H01L21/823842 , H01L21/82385 , H01L27/0886 , H01L27/0922 , H01L27/0924 , H01L29/0649 , H01L29/4236 , H01L29/42376 , H01L29/4966 , H01L29/66545 , H01L29/78 , H01L29/7856
Abstract: A semiconductor device includes an interlayer insulating film formed on a substrate and including a trench, a gate insulating film formed in the trench, a work function adjusting film formed on the gate insulating film in the trench along sidewalls and a bottom surface of the trench, and including an inclined surface having an acute angle with respect to the sidewalls of the trench, and a metal gate pattern formed on the work function adjusting film in the trench to fill up the trench.
Abstract translation: 半导体器件包括形成在衬底上并且包括沟槽的层间绝缘膜,形成在沟槽中的栅极绝缘膜,形成在沟槽中的栅极绝缘膜上的功能调节膜,沿沟槽的侧壁和底表面, 并且包括相对于沟槽的侧壁具有锐角的倾斜表面,以及形成在沟槽中的功函数调节膜上以填充沟槽的金属栅极图案。
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