公开(公告)号：US09502417B2

公开(公告)日：2016-11-22

申请号：US15046572

申请日：2016-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn Kim ,  Hyung-Soon Jang ,  Jong-Mil Youn ,  Tae-Won Ha

IPC: H01L21/70 ,  H01L27/092 ,  H01L29/423 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L29/06 ,  H01L29/161 ,  H01L29/20 ,  H01L29/165 ,  H01L29/78 ,  H01L27/02

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/161 ,  H01L29/165 ,  H01L29/20 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract translation: 半导体器件包括：衬底，包括第一有源区，第二有源区和第一有源区和第二有源区之间的场区;以及栅极结构，形成在衬底上以跨过第一有源区，第二有源区和场 地区。 栅极结构包括彼此直接接触的p型金属栅电极和n型金属栅极电极，p型金属栅极电极从第一有源区域延伸到第二有源区域的一半以下。

公开(公告)号：US09048236B2

公开(公告)日：2015-06-02

申请号：US13947411

申请日：2013-07-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn Kim ,  Jong-Mil Youn ,  Jong-Joon Park ,  Kwang-Yong Jang ,  Jun-Sun Hwang

IPC: H01L29/51 ,  H01L27/088 ,  H01L29/78 ,  H01L29/49 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L29/518 ,  H01L21/82345 ,  H01L21/823462 ,  H01L27/088 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/78

Abstract: A semiconductor device includes an interlayer insulating film formed on a substrate, the insulating layer including a trench. A gate insulating layer is formed on a bottom surface of the trench and a reaction prevention layer is formed on the gate insulating layer on the bottom surface of the trench. A replacement metal gate structure is formed on the reaction prevention layer of the trench to fill the trench.

Abstract translation: 半导体器件包括形成在衬底上的层间绝缘膜，所述绝缘层包括沟槽。 在沟槽的底面上形成栅极绝缘层，在沟槽的底面上的栅极绝缘层上形成反应防止层。 在沟槽的反应防止层上形成替代金属栅极结构以填充沟槽。

公开(公告)号：US20140103441A1

公开(公告)日：2014-04-17

申请号：US13947411

申请日：2013-07-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn Kim ,  Jong-Mil Youn ,  Jong-Joon Park ,  Kwang-Yong Jang ,  Jun-Sun Hwang

IPC: H01L29/51 ,  H01L29/78 ,  H01L27/088

CPC classification number: H01L29/518 ,  H01L21/82345 ,  H01L21/823462 ,  H01L27/088 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/78

Abstract: A semiconductor device includes an interlayer insulating film formed on a substrate, the insulating layer including a trench. A gate insulating layer is formed on a bottom surface of the trench and a reaction prevention layer is formed on the gate insulating layer on the bottom surface of the trench. A replacement metal gate structure is formed on the reaction prevention layer of the trench to fill the trench.

Abstract translation: 半导体器件包括形成在衬底上的层间绝缘膜，所述绝缘层包括沟槽。 在沟槽的底面上形成栅极绝缘层，在沟槽的底面上的栅极绝缘层上形成反应防止层。 在沟槽的反应防止层上形成替代金属栅极结构以填充沟槽。

公开(公告)号：US09698264B2

公开(公告)日：2017-07-04

申请号：US14991127

申请日：2016-01-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn Kim ,  Hyung-Soon Jang ,  Jong-Mil Youn ,  Tae-Won Ha

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/423 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L29/51 ,  H01L29/06 ,  H01L29/161 ,  H01L29/20 ,  H01L29/165 ,  H01L27/02

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/161 ,  H01L29/165 ,  H01L29/20 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

公开(公告)号：US20140239405A1

公开(公告)日：2014-08-28

申请号：US13834488

申请日：2013-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae-Won Ha ,  Suk-Hoon Kim ,  Ju-Youn Kim ,  Kwang-You Seo ,  Jong-Mil Youn

IPC: H01L27/092 ,  H01L29/78

CPC classification number: H01L27/092 ,  H01L21/823807 ,  H01L21/823842 ,  H01L29/1054 ,  H01L29/4958 ,  H01L29/517 ,  H01L29/78 ,  H01L29/7833

Abstract: A semiconductor device using a high-k dielectric film is provided. The semiconductor device comprises a first gate insulating layer on a substrate and a first barrier layer on the first gate insulating layer, the first barrier layer having a first thickness. A first work function control layer is on the first barrier layer. A second barrier layer is present on the first work function control layer, the second barrier layer having a second thickness that is less than the first thickness.

Abstract translation: 提供了使用高k电介质膜的半导体器件。 半导体器件包括衬底上的第一栅极绝缘层和第一栅极绝缘层上的第一势垒层，第一势垒层具有第一厚度。 第一功能控制层位于第一阻挡层上。 第二阻挡层存在于第一功函数控制层上，第二阻挡层具有小于第一厚度的第二厚度。

公开(公告)号：US20180366582A1

公开(公告)日：2018-12-20

申请号：US16109350

申请日：2018-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn Kim ,  Hyung-Soon Jang ,  Jong-Mil Youn ,  Tae-Won Ha

IPC: H01L29/78 ,  H01L29/423 ,  H01L27/092 ,  H01L27/02 ,  H01L29/51 ,  H01L29/49 ,  H01L29/06 ,  H01L29/20 ,  H01L29/161 ,  H01L29/165 ,  H01L21/8238

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

公开(公告)号：US20170278966A1

公开(公告)日：2017-09-28

申请号：US15618623

申请日：2017-06-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn Kim ,  Hyung-Soon Jang ,  Jong-Mil Youn ,  Tae-Won Ha

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/423 ,  H01L21/8238 ,  H01L29/06 ,  H01L27/02 ,  H01L29/161 ,  H01L29/20 ,  H01L29/49 ,  H01L27/092 ,  H01L29/165

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/161 ,  H01L29/165 ,  H01L29/20 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

公开(公告)号：US09240411B1

公开(公告)日：2016-01-19

申请号：US14881525

申请日：2015-10-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn Kim ,  Hyung-Soon Jang ,  Jong-Mil Youn ,  Tae-Won Ha

IPC: H01L27/092 ,  H01L29/423 ,  H01L29/49 ,  H01L29/06

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/161 ,  H01L29/165 ,  H01L29/20 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

公开(公告)号：US09209184B2

公开(公告)日：2015-12-08

申请号：US14683525

申请日：2015-04-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Youn Kim ,  Hyung-Soon Jang ,  Jong-Mil Youn ,  Tae-Won Ha

IPC: H01L27/092 ,  H01L29/423 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/51

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823842 ,  H01L21/823871 ,  H01L27/0207 ,  H01L27/092 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/0642 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/161 ,  H01L29/165 ,  H01L29/20 ,  H01L29/42364 ,  H01L29/42372 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/51 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.

Abstract translation: 半导体器件包括：衬底，包括第一有源区，第二有源区和第一有源区和第二有源区之间的场区;以及栅极结构，形成在衬底上以跨过第一有源区，第二有源区和场 地区。 栅极结构包括彼此直接接触的p型金属栅电极和n型金属栅极电极，p型金属栅极电极从第一有源区域延伸到第二有源区域的一半以下。

公开(公告)号：US09099336B2

公开(公告)日：2015-08-04

申请号：US13834488

申请日：2013-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae-Won Ha ,  Suk-Hoon Kim ,  Ju-Youn Kim ,  Kwang-You Seo ,  Jong-Mil Youn

IPC: H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L29/10

CPC classification number: H01L27/092 ,  H01L21/823807 ,  H01L21/823842 ,  H01L29/1054 ,  H01L29/4958 ,  H01L29/517 ,  H01L29/78 ,  H01L29/7833

Abstract: A semiconductor device using a high-k dielectric film is provided. The semiconductor device comprises a first gate insulating layer on a substrate and a first barrier layer on the first gate insulating layer, the first barrier layer having a first thickness. A first work function control layer is on the first barrier layer. A second barrier layer is present on the first work function control layer, the second barrier layer having a second thickness that is less than the first thickness.

Abstract translation: 提供了使用高k电介质膜的半导体器件。 半导体器件包括衬底上的第一栅极绝缘层和第一栅极绝缘层上的第一势垒层，第一势垒层具有第一厚度。 第一功能控制层位于第一阻挡层上。 第二阻挡层存在于第一功函数控制层上，第二阻挡层具有小于第一厚度的第二厚度。