公开(公告)号：US12219703B2

公开(公告)日：2025-02-04

申请号：US18503974

申请日：2023-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jonghyun Seok ,  Kyeongseon Park

IPC: H05K1/11

Abstract: A printed circuit board includes: a base substrate; a pad region having a plurality of pad patterns disposed on one surface of the base substrate; and a dummy region having a plurality of conductive dummy patterns separated from the plurality of pad patterns to be disposed on the one surface of the base substrate. The pad region includes a first edge region, and a second edge region disposed in a diagonal direction of the first edge region on the one surface of the base substrate. The dummy region includes a third edge region, and a fourth edge region disposed in a diagonal direction of the third edge region on the one surface of the base substrate.

公开(公告)号：US12075560B2

公开(公告)日：2024-08-27

申请号：US17741510

申请日：2022-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Hyun Seok ,  Yong-Jin Kim ,  Kyeongseon Park ,  Hwanwook Park

IPC: H05K1/02 ,  H01P3/08 ,  H01L25/18 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/025 ,  H01P3/08 ,  H01L25/18 ,  H05K1/117 ,  H05K1/18 ,  H05K2201/09227 ,  H05K2201/09245 ,  H05K2201/09336 ,  H05K2201/09672 ,  H05K2201/10159 ,  H05K2201/10515 ,  H05K2201/10522 ,  H05K2201/10545

Abstract: A printed circuit board includes a first electrically conductive reference plane configured to distribute a first reference voltage applied thereto across a surface area of the first reference plane, and a second electrically conductive reference plane extending parallel to the first reference plane, and configured to distribute a second reference voltage applied thereto across a surface area of the second reference plane. A first layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more first signal lines extending adjacent the first reference plane. The first layer is divided into: (i) a first region in which the one or more first signal lines are disposed, (ii) a second region containing an additional plane that is configured to receive a third voltage and has smaller surface area relative to the surface areas of the first and second reference planes, and (iii) a third region containing a dielectric layer. A second layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more second signal lines extending adjacent the second reference plane. The second signal lines have linewidths that vary as a function of whether they are vertically aligned with the first region, the second region, or the third region.

公开(公告)号：US11844176B2

公开(公告)日：2023-12-12

申请号：US17672979

申请日：2022-02-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jonghyun Seok ,  Kyeongseon Park

IPC: H05K1/11

CPC classification number: H05K1/111 ,  H05K2201/09409

Abstract: A printed circuit board includes: a base substrate; a pad region having a plurality of pad patterns disposed on one surface of the base substrate; and a dummy region having a plurality of conductive dummy patterns separated from the plurality of pad patterns to be disposed on the one surface of the base substrate. The pad region includes a first edge region, and a second edge region disposed in a diagonal direction of the first edge region on the one surface of the base substrate. The dummy region includes a third edge region, and a fourth edge region disposed in a diagonal direction of the third edge region on the one surface of the base substrate.

公开(公告)号：US11812547B2

公开(公告)日：2023-11-07

申请号：US17356940

申请日：2021-06-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dongyoon Seo ,  Sangkeun Kwak ,  Dohyung Kim ,  Kyeongseon Park ,  Hwanwook Park ,  Wonseop Lee ,  Daae Heo

IPC: H05K1/00 ,  H05K1/02 ,  H05K1/14

CPC classification number: H05K1/0263 ,  H05K1/0296 ,  H05K1/142 ,  H05K2201/10159

Abstract: A memory module including: a first printed circuit board; a first socket and a second socket; and a daisy chain pattern formed in a first region of the first printed circuit board and connected to the first socket and the second socket, wherein an electrical signal on the daisy chain pattern is transferred to a host device when the first socket and the second socket are connected to the host device.

公开(公告)号：US20230065980A1

公开(公告)日：2023-03-02

申请号：US17741510

申请日：2022-05-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Hyun Seok ,  Yong-Jin Kim ,  Kyeongseon Park ,  Hwanwook Park

IPC: H05K1/02 ,  H01P3/08

Abstract: A printed circuit board includes a first electrically conductive reference plane configured to distribute a first reference voltage applied thereto across a surface area of the first reference plane, and a second electrically conductive reference plane extending parallel to the first reference plane, and configured to distribute a second reference voltage applied thereto across a surface area of the second reference plane. A first layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more first signal lines extending adjacent the first reference plane. The first layer is divided into: (i) a first region in which the one or more first signal lines are disposed, (ii) a second region containing an additional plane that is configured to receive a third voltage and has smaller surface area relative to the surface areas of the first and second reference planes, and (iii) a third region containing a dielectric layer. A second layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more second signal lines extending adjacent the second reference plane. The second signal lines have linewidths that vary as a function of whether they are vertically aligned with the first region, the second region, or the third region.