公开(公告)号：US20210057536A1

公开(公告)日：2021-02-25

申请号：US16829372

申请日：2020-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DOOHYUN LEE ,  HEONJONG SHIN ,  MINCHAN GWAK ,  HYUNHO PARK ,  SUNGHUN JUNG ,  YONGSIK JEONG ,  SANGWON JEE ,  INCHAN HWANG

IPC: H01L29/45 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/786 ,  H01L21/8238 ,  H01L29/66

Abstract: A semiconductor device including: a substrate that includes a first active region and a second active region; a first source/drain pattern on the first active region; a second source/drain pattern on the second active region; a separation dielectric pattern on the substrate between the first source/drain pattern and the second source/drain pattern; and a first contact pattern on the first source/drain pattern, wherein the first contact pattern includes: a first metal pattern; a first barrier pattern between the first metal pattern and the first source/drain pattern; and a second barrier pattern between the first barrier pattern and the first source/drain pattern, wherein the first barrier pattern contacts the separation dielectric pattern and extends along a sidewall of the first metal pattern adjacent to the separation dielectric pattern.

公开(公告)号：US20240282828A1

公开(公告)日：2024-08-22

申请号：US18238872

申请日：2023-08-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngwoo Kim ,  KYOUNGWOO LEE ,  MINCHAN GWAK ,  Gukhee Kim ,  SANGCHEOL NA ,  Anthony Dongick Lee

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

Abstract: An embodiment provides a semiconductor device including a semiconductor substrate having first and second surfaces opposite each other, a channel pattern disposed on the first surface of the semiconductor substrate; source/drain patterns disposed on the first surface of the semiconductor substrate and disposed at both sides of the channel pattern; first and second etch stop films disposed on the first surface of the semiconductor substrate; a contact electrode electrically connected to the source/drain patterns; a lower wire structure disposed on the second surface of the semiconductor substrate; and a through via that passes through the semiconductor substrate, the first etch stop film, and the second etch stop film to connect the contact electrode and the lower wire structure, wherein the through via includes a first portion contacting the contact electrode and a second portion contacting the first portion and disposed between the first portion and the lower wire structure.

公开(公告)号：US20240105724A1

公开(公告)日：2024-03-28

申请号：US18196741

申请日：2023-05-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DONGHOON HWANG ,  MYUNGIL KANG ,  MINCHAN GWAK ,  Kyungho KIM ,  Kyung Hee CHO ,  DOYOUNG CHOI

IPC: H01L27/092 ,  H01L21/822 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L27/0922 ,  H01L21/8221 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823871 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775

Abstract: A three-dimensional semiconductor device includes a first active region on a substrate, the first active region including a lower channel pattern and a lower source/drain pattern connected to the lower channel pattern, a second active region stacked on the first active region, the second active region including an upper channel pattern and an upper source/drain pattern connected to the upper channel pattern, a gate electrode on the lower channel pattern and the upper channel pattern, a lower contact electrically connected to the lower source/drain pattern, the lower contact having a bar shape extending on the lower source/drain pattern in a first direction, a first active contact coupled to the lower contact, and a second active contact coupled to the upper source/drain pattern. A first width of the lower source/drain pattern in a second direction is larger than a second width of the lower contact in the second direction.

公开(公告)号：US20220020860A1

公开(公告)日：2022-01-20

申请号：US17488443

申请日：2021-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DOOHYUN LEE ,  HEONJONG SHIN ,  MINCHAN GWAK ,  HYUNHO PARK ,  SUNGHUN JUNG ,  YONGSIK JEONG ,  SANGWON JEE ,  INCHAN HWANG

IPC: H01L29/45 ,  H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/786 ,  H01L21/8238 ,  H01L27/092

Abstract: A semiconductor device including: a substrate that includes a first active region and a second active region; a first source/drain pattern on the first active region; a second source/drain pattern on the second active region; a separation dielectric pattern on the substrate between the first source/drain pattern and the second source/drain pattern; and a first contact pattern on the first source/drain pattern, wherein the first contact pattern includes: a first metal pattern; a first barrier pattern between the first metal pattern and the first source/drain pattern; and a second barrier pattern between the first barrier pattern and the first source/drain pattern, wherein the first barrier pattern contacts the separation dielectric pattern and extends along a sidewall of the first metal pattern adjacent to the separation dielectric pattern.