Abstract:
A storage device includes at least one nonvolatile memory device configured to store self-diagnosis firmware and a storage controller configured to communicate with an external device through a sideband interface. The storage controller is configured to perform self-diagnosis of the storage device using the self-diagnosis firmware according to the control of the external device. The storage controller is configured to transmit a result of the self-diagnosis to the external device through the sideband interface.
Abstract:
A test system for a memory device includes: a chamber including at least one test socket column having a plurality of test sockets arranged in a first direction, wherein memory devices to be tested are in respective ones of the plurality of test sockets, a temperature adjusting apparatus configured to supply air into the chamber according to a temperature control signal to control a temperature of the chamber, a test device electrically connected to the test sockets and configured to test the memory devices, and a temperature controller configured to receive temperature information of the memory devices from temperature sensors of the memory devices and to output to the temperature adjusting apparatus the temperature control signal to compensate for a temperature difference between a detected temperature of the memory devices and a target temperature.
Abstract:
A test system for a memory device includes: a chamber including at least one test socket column having a plurality of test sockets arranged in a first direction, wherein memory devices to be tested are in respective ones of the plurality of test sockets, a temperature adjusting apparatus configured to supply air into the chamber according to a temperature control signal to control a temperature of the chamber, a test device electrically connected to the test sockets and configured to test the memory devices, and a temperature controller configured to receive temperature information of the memory devices from temperature sensors of the memory devices and to output to the temperature adjusting apparatus the temperature control signal to compensate for a temperature difference between a detected temperature of the memory devices and a target temperature.
Abstract:
A test system for a memory device includes: a chamber including at least one test socket column having a plurality of test sockets arranged in a first direction, wherein memory devices to be tested are in respective ones of the plurality of test sockets, a temperature adjusting apparatus configured to supply air into the chamber according to a temperature control signal to control a temperature of the chamber, a test device electrically connected to the test sockets and configured to test the memory devices, and a temperature controller configured to receive temperature information of the memory devices from temperature sensors of the memory devices and to output to the temperature adjusting apparatus the temperature control signal to compensate for a temperature difference between a detected temperature of the memory devices and a target temperature.
Abstract:
A user device includes a storage device including a flash memory; and a host connected to the storage device via an interface and adapted to transmit data to the storage device. The host provides the storage device with erase count information of the flash memory using a host flash translation layer (FTL), provides the storage device with reprogram information when the flash memory uses a reprogram method, or provides the storage device with page offset information of an open block of the flash memory.
Abstract:
A system for testing semiconductor modules may include a first testing unit, a second testing unit, a classifying unit and a transferring unit. The first testing unit may test functions of the semiconductor modules mounted on a main board. The second testing unit may test the semiconductor modules tested by the first testing unit using a terminal. The classifying unit may classify the semiconductor modules tested by the second testing unit into normal semiconductor modules and abnormal semiconductor modules, or pass/fail. The transferring unit may be connected in-line between the first testing unit and the second testing unit, and between the second testing unit and the classifying unit to transfer the semiconductor modules from the first testing unit to the second testing unit and the classifying unit. Thus, the semiconductor modules may be automatically transferred to the units, so that a test time may be reduced.
Abstract:
A memory card includes a first ground terminal arranged in a first row that provides a ground voltage to at least one nonvolatile memory or a memory controller, universal flash storage (UFS) terminals arranged in a second row including a first UFS terminal that provides a second power, a second UFS terminal that provides a reference clock signal, and a third UFS terminal that provides a path for input/output data to the memory controller, and a first power terminal arranged in a third row that provides a first power supply voltage (VCC) to the at least one nonvolatile memory or the memory controller. The memory card has a size defined by a nano subscriber identification module (SIM) card standard, the first ground terminal corresponds to a “C5” terminal of the nano SIM card standard, and the first power terminal corresponds to a “C1” terminal of the nano SIM card standard.
Abstract:
A test system for a memory device includes: a chamber including at least one test socket column having a plurality of test sockets arranged in a first direction, wherein memory devices to be tested are in respective ones of the plurality of test sockets, a temperature adjusting apparatus configured to supply air into the chamber according to a temperature control signal to control a temperature of the chamber, a test device electrically connected to the test sockets and configured to test the memory devices, and a temperature controller configured to receive temperature information of the memory devices from temperature sensors of the memory devices and to output to the temperature adjusting apparatus the temperature control signal to compensate for a temperature difference between a detected temperature of the memory devices and a target temperature.
Abstract:
An apparatus for testing electronic devices may include a test chamber, a heating unit, a cooling unit and a controller. The test chamber may include a plurality of slots configured to receive the electronic devices. The heating unit may heat the electronic devices in the slots. The cooling unit may individually cool the electronic devices in the slots. The controller may selectively control operations of the heating unit and the cooling unit in accordance with temperatures in the slots. Thus, the electronic devices may be provided with a uniform test temperature so that reliability of test results may be improved.
Abstract:
A user device includes a storage device including a flash memory; and a host connected to the storage device via an interface and adapted to transmit data to the storage device. The host provides the storage device with erase count information of the flash memory using a host flash translation layer (FTL), provides the storage device with reprogram information when the flash memory uses a reprogram method, or provides the storage device with page offset information of an open block of the flash memory.