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公开(公告)号：US10483985B2
公开(公告)日：2019-11-19
申请号：US15834342
申请日：2017-12-07
Inventor： Chisung Bae , Sangjoon Kim , Yoonmyung Lee , Jaehong Jung , Jung-Hoon Chun
Abstract: An oscillator using a supply regulation loop and a method of operating the oscillator are provided. The oscillator includes a reference voltage generator configured to generate reference voltages from a supply voltage, a supply regulation loop circuit including a first operational amplifier and a transistor, the first operational amplifier being configured to receive a first reference voltage of the reference voltages, and the transistor being connected to an output terminal of the first operational amplifier, and a frequency locked loop (FLL) circuit configured to generate a clock signal, based on an input voltage determined based on a current flowing in the transistor and a second reference voltage of the reference voltages, wherein the first operational amplifier may include an input terminal configured to receive the first reference voltage and to receive negative feedback from the transistor, and the output terminal being configured to generate an output voltage independent of noise of the supply voltage.
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2.发明授权User authentication method and apparatus based on fingerprint and electrocardiogram (ECG) signal 有权基于指纹和心电图（ECG）信号的用户认证方法和设备公开(公告)号：US09576179B2
公开(公告)日：2017-02-21
申请号：US14666522
申请日：2015-03-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Chisung Bae , Sangjoon Kim
CPC classification number: G06K9/0008 , G06K9/00006 , G06K9/00013 , G06K9/0002 , G06K9/00087 , G06K9/00892 , G06K9/6289 , G06K2009/00939
Abstract: An authentication apparatus includes a biometric data acquirer configured to acquire fingerprint data and an electrocardiogram (ECG) waveform of a user, and a humidity level acquirer configured to acquire a humidity level of skin of the user. The apparatus further includes a similarity extractor configured to adjust a first similarity between the fingerprint data and reference fingerprint data of a pre-registered user, and a second similarity between the ECG waveform and a reference ECG waveform of the pre-registered user, based on the humidity level, and extract a combined similarity based on the adjusted first similarity and the adjusted second similarity. The apparatus further includes an authenticator configured to authenticate whether the user is the pre-registered user based on the combined similarity.
Abstract translation: 认证装置包括生物体数据获取装置，被配置为获取用户的指纹数据和心电图（ECG）波形，以及湿度级别获取器，被配置为获取用户皮肤的湿度水平。 该装置还包括相似性提取器，其被配置为基于预先注册的用户的指纹数据和参考指纹数据之间的第一相似度以及ECG波形与预注册用户的参考ECG波形之间的第二相似度，基于 湿度水平，并且基于经调整的第一相似度和调整的第二相似度提取组合相似度。 该装置还包括认证器，被配置为基于组合的相似性来认证用户是否是预注册用户。
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公开(公告)号：US12201841B2
公开(公告)日：2025-01-21
申请号：US17551696
申请日：2021-12-15
Applicant: SAMSUNG ELECTRONICS CO., LTD. , NORTHEASTERN UNIVERSITY
Inventor： Junyeub Suh , Sangjoon Kim , Hui Fang , Jaehyeon Ryu
Abstract: An implant system includes an electrode portion comprising plural electrodes to perform nerve stimulation and nerve sensing, an impedance controller configured to selectively connect the plural electrodes between a stimulator to perform nerve stimulation and a sensor to perform nerve sensing based on a control signal, and set an impedance of each of the plural electrodes, and a processor configured to control a contact impedance by the plural electrodes by generating the control signal to control at least one of plural switches connected respectively to the plural electrodes, or variable resistors connected respectively to the plural electrodes, based on at least one of a selectively set purpose of the plural electrodes or a position of an electrode to which nerve stimulation is to be provided.
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公开(公告)号：US11804266B2
公开(公告)日：2023-10-31
申请号：US17992143
申请日：2022-11-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyungwoo Lee , Sangjoon Kim , Yongmin Ju
CPC classification number: G11C13/0069 , G06N3/063 , G11C11/54 , G11C13/004 , G11C13/0026 , G11C13/0028 , G11C13/0038 , G11C13/0061
Abstract: An apparatus for performing in-memory processing includes a memory cell array of memory cells configured to output a current sum of a column current flowing in respective column lines of the memory cell array based on an input signal applied to row lines of the memory cells, a sampling circuit, comprising a capacitor connected to each of the column lines, configured to be charged by a sampling voltage of a corresponding current sum of the column lines, and a processing circuit configured to compare a reference voltage and a currently charged voltage in the capacitor in response to a trigger pulse generated at a timing corresponding to a quantization level, among quantization levels, time-sectioned based on a charge time of the capacitor, and determine the quantization level corresponding to the sampling voltage by performing time-digital conversion when the currently charged voltage reaches the reference voltage.
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公开(公告)号：US20210405967A1
公开(公告)日：2021-12-30
申请号：US17093889
申请日：2020-11-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seungchul Jung , Sungmeen Myung , Sangjoon Kim
Abstract: A method of performing a predetermined operation for a circuit that includes a resistor group, one end of the resistor group being configured for connection to a power supply unit, the other end of the resistor group being configured for connection to a sampling capacitor, and a parasitic capacitance existing at each node between resistors of the resistor group. The method includes in a forward process, determining a time when a sampling capacitor voltage applied to the sampling capacitor reaches a first reference voltage as a switching time; at the switching time, connecting the sampling capacitor to a ground or predetermined voltage and floating the power supply unit; in a backward process, after the switching time, determining a time when a power supply unit voltage applied to the power supply unit reaches a second reference voltage as an end time; and performing the predetermined operation based on the end time.
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Patent Agency Ranking
公开(公告)号：US20180212610A1
公开(公告)日：2018-07-26
申请号：US15834342
申请日：2017-12-07
Inventor： Chisung Bae , Sangjoon Kim , Yoonmyung Lee , Jaehong Jung , Jung-Hoon Chun
CPC classification number: H03L3/00 , H03L1/00 , H03L5/00 , H03L7/02 , H03L7/06 , H03L7/099 , H03L7/0995
Abstract: An oscillator using a supply regulation loop and a method of operating the oscillator are provided. The oscillator includes a reference voltage generator configured to generate reference voltages from a supply voltage, a supply regulation loop circuit including a first operational amplifier and a transistor, the first operational amplifier being configured to receive a first reference voltage of the reference voltages, and the transistor being connected to an output terminal of the first operational amplifier, and a frequency locked loop (FLL) circuit configured to generate a clock signal, based on an input voltage determined based on a current flowing in the transistor and a second reference voltage of the reference voltages, wherein the first operational amplifier may include an input terminal configured to receive the first reference voltage and to receive negative feedback from the transistor, and the output terminal being configured to generate an output voltage independent of noise of the supply voltage.
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公开(公告)号：US11989531B2
公开(公告)日：2024-05-21
申请号：US17473139
申请日：2021-09-13
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sungmeen Myung , Seungchul Jung , Sangjoon Kim
Abstract: A multi-bit cell includes: a memory storing a weight resistance corresponding to a multi-bit weight; a current source configured to apply a current to the memory to generate a weight voltage from the weight resistance; a plurality of multiplexers connected to each other in parallel and connected to the memory in series, each of the multiplexers being configured to output one signal of the weight voltage and a first fixed voltage based on a multi-bit input; and a plurality of capacitors connected to the plurality of multiplexers, respectively, each of the capacitors being configured to store a respective weight capacitance, and to generate charge data by performing an operation on the outputted signal and the weight capacitance.
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公开(公告)号：US11581042B2
公开(公告)日：2023-02-14
申请号：US17181259
申请日：2021-02-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyungwoo Lee , Sangjoon Kim , Seungchul Jung , Yongmin Ju
Abstract: Provided are processing and an electronic device including the same. The processing apparatus includes a bit cell line comprising bit cells connected in series, a mirror circuit unit configured to generate a mirror current by replicating a current flowing through the bit cell line at a ratio, a charge charging unit configured to charge a voltage corresponding to the mirror current as the mirror current replicated by the mirror circuit unit is applied, and a voltage measuring unit configured to output a value corresponding to a multiply-accumulate (MAC) operation of weights and inputs applied to the bit cell line, based on the voltage charged by the charge charging unit.
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公开(公告)号：US12141687B2
公开(公告)日：2024-11-12
申请号：US17195917
申请日：2021-03-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seungchul Jung , Sangjoon Kim , Sungmeen Myung
IPC: G06N3/065 , G06F7/544 , G11C11/4094 , H10B61/00 , G06N3/048
Abstract: A processing device includes: a plurality of bitcells, each of the plurality of bitcells including: a variable resistor layer including a plurality of active variable resistors and a plurality of inactive variable resistors; an active layer including a plurality of switches configured to control either one of a voltage to be applied between ends of each of the active variable resistors and a current flowing to each of the active variable resistors; and a plurality of metal layers including wires electrically connecting the active variable resistors to the switches, wherein at least one of the plurality of bitcells includes a via penetrating through the variable resistor layer and connecting at least one of the switches to at least one of the active variable resistors.
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公开(公告)号：US11816447B2
公开(公告)日：2023-11-14
申请号：US17093889
申请日：2020-11-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seungchul Jung , Sungmeen Myung , Sangjoon Kim
CPC classification number: G06F7/5443 , G01R19/16538 , G01R27/02 , G04F10/005 , G06N3/08 , H03K5/24
Abstract: A method of performing a predetermined operation for a circuit that includes a resistor group, one end of the resistor group being configured for connection to a power supply unit, the other end of the resistor group being configured for connection to a sampling capacitor, and a parasitic capacitance existing at each node between resistors of the resistor group. The method includes in a forward process, determining a time when a sampling capacitor voltage applied to the sampling capacitor reaches a first reference voltage as a switching time; at the switching time, connecting the sampling capacitor to a ground or predetermined voltage and floating the power supply unit; in a backward process, after the switching time, determining a time when a power supply unit voltage applied to the power supply unit reaches a second reference voltage as an end time; and performing the predetermined operation based on the end time.
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