公开(公告)号：US20170288717A1

公开(公告)日：2017-10-05

申请号：US15397012

申请日：2017-01-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seon-Kyoo LEE ,  Byung-Hoon JEONG ,  Jeong-Don IHM ,  Young-Don CHOI

IPC: H04B1/24 ,  H04L25/03 ,  H04L12/863

CPC classification number: H04B1/24 ,  H04L25/0292 ,  H04L25/0298 ,  H04L25/03847 ,  H04L25/03878 ,  H04L47/6235 ,  H04L49/90

Abstract: A reception interface circuit includes a termination circuit, a buffer and an interface controller. The termination circuit is configured to change a termination mode in response to a termination control signal. The buffer is configured to change a reception characteristic in response to a buffer control signal. The interface controller is configured to generate the termination control signal and the buffer control signal such that the reception characteristic of the buffer is changed in association with the change in the termination mode. The reception interface circuit may support various communication standards by changing the reception characteristic of the buffer in association with the termination mode. Using the reception interface circuit, communication efficiency of transceiver systems such as a memory system and/or compatibility between a transmitter device and a receiver device may be improved.

公开(公告)号：US20180315461A1

公开(公告)日：2018-11-01

申请号：US16026286

申请日：2018-07-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seon-Kyoo LEE ,  Jeong-Don IHM ,  Byung-Hoon JEONG ,  Dae-Woon KANG

IPC: G11C7/14 ,  G11C7/10 ,  G11C29/02 ,  G11C29/44

CPC classification number: G11C7/14 ,  G11C7/1057 ,  G11C7/1084 ,  G11C29/021 ,  G11C29/028 ,  G11C29/4401

Abstract: A semiconductor device, includes at least a first memory chip, which includes at least a first buffer connected to receive an input signal and a reference voltage; at least a first reference voltage generator configured to output a reference voltage based on a first control code; and at least a first self-training circuit for determining an operational reference voltage to use during a normal mode of operation of the semiconductor device. An output from the first buffer is input to the first self-training circuit, the first control code is output from the first self-training circuit into the first reference voltage generator, and the first buffer, the first self-training circuit, and the first reference voltage generator form a loop.

公开(公告)号：US20190198067A1

公开(公告)日：2019-06-27

申请号：US16113500

申请日：2018-08-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seon-Kyoo LEE ,  Dae-Hoon NA ,  Jeong-Don IHM ,  Byung-Hoon JEONG ,  Young-Don CHOI

IPC: G11C7/10 ,  G11C7/22 ,  G11C7/06 ,  H01L25/065

CPC classification number: G11C7/1051 ,  G11C7/06 ,  G11C7/065 ,  G11C7/08 ,  G11C7/1048 ,  G11C7/1066 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/14 ,  G11C7/222 ,  H01L24/48 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06586 ,  H01L2924/15192 ,  H01L2924/15311

Abstract: An apparatus includes data transmitter having first through N-th data drivers configured to provide first through N-th data signals, respectively, and a strobe driver configured to provide a strobe signal, and a data receiver having a strobe buffer configured to generate a control signal based on the strobe signal, and first through N-th sense amplifiers configured to sense N-bit data based on the control signal, a reference signal and the first through N-th data signals. The bus includes a strobe TSV configured to connect the strobe driver with the strobe buffer, and first through N-th data TSVs configured to connect the first through N-th data drivers with the first through N-th sense amplifiers, respectively. A reference signal supplier controls the reference signal such that a discharge speed of the reference signal is slower than a discharge speed of each of the first through N-th data signals during data transmission.

公开(公告)号：US20170287535A1

公开(公告)日：2017-10-05

申请号：US15333468

申请日：2016-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seon-Kyoo LEE ,  Jeong-Don IHM ,  Byung-Hoon JEONG ,  Dae-Woon KANG

IPC: G11C7/14 ,  G11C7/10

CPC classification number: G11C7/14 ,  G11C7/1057 ,  G11C7/1084 ,  G11C29/021 ,  G11C29/028 ,  G11C29/4401

Abstract: A semiconductor device, includes at least a first memory chip, which includes at least a first buffer connected to receive an input signal and a reference voltage; at least a first reference voltage generator configured to output a reference voltage based on a first control code; and at least a first self-training circuit for determining an operational reference voltage to use during a normal mode of operation of the semiconductor device. An output from the first buffer is input to the first self-training circuit, the first control code is output from the first self-training circuit into the first reference voltage generator, and the first buffer, the first self-training circuit, and the first reference voltage generator form a loop.