公开(公告)号：US20200051976A1

公开(公告)日：2020-02-13

申请号：US16290199

申请日：2019-03-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Seok HA ,  Hyun Seung SONG ,  Hyo Jin KIM ,  Kyoung Mi PARK ,  Guk Il AN

IPC: H01L27/088 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/308

Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.

公开(公告)号：US20240186321A1

公开(公告)日：2024-06-06

申请号：US18436812

申请日：2024-02-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Seok HA ,  Hyun Seung SONG ,  Hyo Jin KIM ,  Kyoung Mi PARK ,  Guk Il AN

IPC: H01L27/088 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L21/3086 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.

公开(公告)号：US20230053251A1

公开(公告)日：2023-02-16

申请号：US17977031

申请日：2022-10-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Seok HA ,  Hyun Seung SONG ,  Hyo Jin KIM ,  Kyoung Mi PARK ,  Guk Il AN

IPC: H01L27/088 ,  H01L29/66 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/78

Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.

公开(公告)号：US20240304484A1

公开(公告)日：2024-09-12

申请号：US18525803

申请日：2023-11-30

Applicant: SAMSUNG ELECTRONICS CO. LTD.

Inventor： Hyeon Uk KIM ,  Kyoung Soo KIM ,  Kun Jin RYU ,  Gyeong Dam BAEK ,  Seung Hyuk BAEK ,  Dong Chan SEO ,  Hu Jong LEE ,  Jae Hyuk CHA ,  Ji Won YOON ,  Sun Oh KIM ,  Kyeong Jun MIN ,  Ji Wook KWON ,  Seung Seok HA ,  Gil Do KIM

IPC: H01L21/677 ,  H01L21/67

CPC classification number: H01L21/6773 ,  H01L21/67259 ,  B25J11/0095

Abstract: A stocker system including a stocker apparatus, a transfer robot including a sensing module and a robot arm, a manual port of the stocker apparatus, and a controller in communication with the transfer robot, wherein the controller communicates with the sensing module to determine that a container is transferrable by the robot arm between the manual port of the stocker apparatus and the transfer robot.

公开(公告)号：US20200027870A1

公开(公告)日：2020-01-23

申请号：US16395691

申请日：2019-04-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Seok HA ,  Kyoung-Mi PARK ,  Hyun-Seung SONG ,  Keon Yong CHEON ,  Dae Won HA

IPC: H01L27/02 ,  H01L27/092 ,  H01L29/06 ,  H01L21/8238

Abstract: A semiconductor device includes a first fin pattern and a second fin pattern in a NMOS region, each extending lengthwise along a first direction and separated by a first trench and a third fin pattern and a fourth fin pattern in a PMOS region, each extending lengthwise along the first direction in parallel with respective ones of the first fin pattern and the second fin pattern and separated by a second trench. First and second isolation layers are disposed in the first and second trenches, respectively. A first gate electrode extends lengthwise along a second direction transverse to the first direction and crosses the first fin pattern. A second gate electrode extends lengthwise along the second direction and crosses the second fin pattern. Spaced apart third and fourth gate electrodes extend lengthwise along the second direction on the second isolation layer.

公开(公告)号：US20220352342A1

公开(公告)日：2022-11-03

申请号：US17838573

申请日：2022-06-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Guk Il AN ,  Keun Hwi CHO ,  Dae Won HA ,  Seung Seok HA

IPC: H01L29/51 ,  H01L23/522 ,  H01L27/088 ,  H01L29/78 ,  H01L49/02

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.

公开(公告)号：US20210167184A1

公开(公告)日：2021-06-03

申请号：US17176226

申请日：2021-02-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Guk Il AN ,  Keun Hwi CHO ,  Dae Won HA ,  Seung Seok HA

IPC: H01L29/51 ,  H01L27/088 ,  H01L23/522 ,  H01L49/02 ,  H01L29/78

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate and a first conductive connection group on the gate structure. The gate structure includes a gate spacer and a gate electrode. The first conductive connection group includes a ferroelectric material layer. At least a part of the ferroelectric material layer is disposed above an upper surface of the gate spacer. And the ferroelectric material layer forms a ferroelectric capacitor having a negative capacitance in the first conductive connection group.

公开(公告)号：US20210013200A1

公开(公告)日：2021-01-14

申请号：US17036355

申请日：2020-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Seok HA ,  Hyun Seung SONG ,  Hyo Jin KIM ,  Kyoung Mi PARK ,  Guk Il AN

IPC: H01L27/088 ,  H01L29/66 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/78

Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.

公开(公告)号：US20250098292A1

公开(公告)日：2025-03-20

申请号：US18966327

申请日：2024-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Seok HA ,  Hyun Seung SONG ,  Hyo Jin KIM ,  Kyoung Mi PARK ,  Guk Il AN

IPC: H01L27/088 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes a substrate having a first region and a second region, first active fins that extend in a first direction in the first region, second active fins that extend in the first direction in the second region, a first field insulating layer between the first active fins and that extend in a second direction, a second field insulating layer between the second active fins and extending in the second direction, a gate line that extends in the second direction on the second field insulating layer, the gate line linearly along with the first field insulating layer, a gate isolation layer between the first field insulating layer and the gate line, and gate spacers that extend in the second direction, the gate spacers in contact with both sidewalls of each of the first field insulating layer, the gate line, and the gate isolation layer.

公开(公告)号：US20240339540A1

公开(公告)日：2024-10-10

申请号：US18386898

申请日：2023-11-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Beom Jin KIM ,  Guk Hee KIM ,  Young Woo KIM ,  Jun Soo KIM ,  Sang Cheol NA ,  Kyoung Woo LEE ,  Anthony Dongick LEE ,  Min Seung LEE ,  Myeong Gyoon CHAE ,  Seung Seok HA

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/7855 ,  H01L29/0673 ,  H01L29/41775 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an active pattern extending in a first horizontal direction on an upper surface of the substrate, a field insulating layer surrounding a sidewall of the active pattern on the upper surface of the substrate, a first gate electrode extending in a second horizontal direction intersecting the first horizontal direction on the active pattern, a source/drain region disposed on at least one side of the first gate electrode on the active pattern, an upper interlayer insulating layer covering the source/drain region on the field insulating layer, a through via penetrating through the substrate, the field insulating layer and the upper interlayer insulating layer in a vertical direction, the through via spaced apart from the source/drain region in the second horizontal direction, a source/drain contact disposed inside the upper interlayer insulating layer on at least one side of the first gate electrode, the source/drain contact connected to the source/drain region, and a connection portion disposed inside the upper interlayer insulating layer, the connection portion connected to each of the through via and the source/drain contact, wherein a width of the connection portion in the first horizontal direction is greater than a width of the source/drain contact in the first horizontal direction.