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公开(公告)号:US20170261317A1
公开(公告)日:2017-09-14
申请号:US15448325
申请日:2017-03-02
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seung Yoon LEE , Chan HWANG , Jeong Jin LEE
CPC classification number: G01B11/272 , G01B11/002 , G03F9/7084 , H01L2224/16145
Abstract: A method for measuring wafer alignment is provided. The method includes providing a plurality of first mark patterns extending in a first direction on a wafer, providing at least one second mark pattern on the first mark patterns such that it overlaps and intersects the first mark patterns, irradiating an optical signal onto the first mark patterns and the second mark pattern and obtaining coordinates of the second mark pattern by detecting signals from the second mark pattern.
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公开(公告)号:US20170357154A1
公开(公告)日:2017-12-14
申请号:US15392297
申请日:2016-12-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: SEUNG HWA OH , Seung Yoon LEE , Jeong Jin LEE
CPC classification number: G03F1/44 , G01B11/005 , G03F1/36 , G03F1/42 , G03F7/70633 , G03F7/70683 , H01L21/0273 , H01L22/12 , H01L22/20 , H01L22/30
Abstract: A method may include forming a first grating and a second grating, disposed in a region of vertical overlap of the first and second gratings on different levels, respectively, having substantially the same pitch, and inclined with respect to each other, such that a bias value between the first and second gratings is changed along a length direction of the first and second gratings, using a lithography process. A method may include emitting a beam to the first and second gratings; and obtaining trend information associated with a diffracted beam from an image pattern of a beam from the first and second gratings, using the emitted beam, in which the trend information may concern changes in the intensity of the diffracted beam according to the bias value. An overlay error in at least one grating may be determined based on the trend information and an intensity of a diffracted beam.
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公开(公告)号:US20240213023A1
公开(公告)日:2024-06-27
申请号:US18373455
申请日:2023-09-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Doo Gyu LEE , Jeong Jin LEE , Min-Cheol KWAK , Seung Yoon LEE , Chan HWANG
IPC: H01L21/027 , H01L21/311 , H01L21/3213 , H01L21/66
CPC classification number: H01L21/0273 , H01L21/31144 , H01L21/32139 , H01L22/12
Abstract: A method for fabricating a semiconductor device using an overlay measurement and a semiconductor device fabricated by the method are provided. The method includes forming a lower pattern including a lower overlay key pattern having a first pitch, on a substrate, forming an upper pattern including an upper overlay key pattern having a second pitch different from the first pitch, on the lower pattern, measuring an overlay between the lower overlay key pattern and the upper overlay key pattern, removing the upper overlay key pattern, and after removing the upper overlay key pattern, performing an etching process using the upper pattern as an etching mask.
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