公开(公告)号：US11903145B2

公开(公告)日：2024-02-13

申请号：US17379026

申请日：2021-07-19

申请人： Samsung Electronics Co., Ltd.

发明人： Seung-Yeol Yang

IPC分类号： H05K1/11 ,  H05K3/46

CPC分类号： H05K3/4605 ,  H05K1/112 ,  H05K3/4644 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2203/1377

摘要： A wiring board may include a core portion having first and second surfaces, and first and second buildup portions on the first and second surfaces, respectively. Each of the first and second buildup portions may include a first insulating layer on the core portion, a wire pattern on the first insulating layer, a second insulating layer on the first insulating layer to cover the wire pattern, and a protection layer covering the second insulating layer and exposing a portion of the wire pattern. The second insulating layer may include a resin layer and inorganic fillers distributed in the resin layer. The fillers may not be provided in the protection layer, and the resin layer of the second insulating layer and the protection layer may be formed of the same material. The wire patterns of the first and second buildup portions may be electrically connected to each other.

公开(公告)号：US09543205B2

公开(公告)日：2017-01-10

申请号：US14712170

申请日：2015-05-14

申请人： Samsung Electronics Co., Ltd.

发明人： Seung-Yeol Yang

IPC分类号： H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

CPC分类号： H01L21/78 ,  H01L21/561 ,  H01L23/3128 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/80815 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06558 ,  H01L2924/014 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2224/81

摘要： The method includes disposing semiconductor chips on a package substrate having sawing lines, forming an encapsulant to cover the semiconductor chips on the package substrate, forming a package assembly by a first curing of the encapsulant, forming first grooves by cutting the encapsulant along the sawing lines, performing a second curing of the encapsulant, and dividing the package assembly into unit semiconductor packages by cutting the package substrate along the sawing lines and forming second grooves to overlap the first grooves.

摘要翻译： 该方法包括将半导体芯片布置在具有锯切线的封装衬底上，形成密封剂以覆盖封装衬底上的半导体芯片，通过密封剂的第一次固化形成封装组件，通过沿锯线切割密封剂形成第一凹槽 ，进行密封剂的第二固化，并且通过沿锯线切割封装衬底并且形成第二凹槽以与第一凹槽重叠，将封装组件分成单元半导体封装。

公开(公告)号：US09530755B2

公开(公告)日：2016-12-27

申请号：US14108331

申请日：2013-12-16

申请人： Samsung Electronics Co., Ltd.

发明人： Seung-Yeol Yang ,  Jonggi Lee

IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L23/3128 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06568 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00

摘要： Provided is a semiconductor package including a substrate, a first semiconductor chip disposed on the substrate to have a rectangular shape with long and short sides, and a second semiconductor chip disposed on the first semiconductor chip to have a rectangular shape with long and short sides. Centers of the first and second semiconductor chips may be located at substantially the same position as that of the substrate, and the long side of the first semiconductor chip may be substantially parallel to a diagonal line of the substrate. Further, the long side of the second semiconductor chip may be not parallel to that of the first semiconductor chip.

摘要翻译： 本发明提供一种半导体封装，包括：基板，设置在基板上的具有长边和短边的矩形的第一半导体芯片，以及设置在第一半导体芯片上的具有长边和短边的矩形形状的第二半导体芯片。 第一和第二半导体芯片的中心可以位于与衬底基本相同的位置，并且第一半导体芯片的长边可以基本上平行于衬底的对角线。 此外，第二半导体芯片的长边可能不与第一半导体芯片的长边平行。