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公开(公告)号:US20220069011A1
公开(公告)日:2022-03-03
申请号:US17209660
申请日:2021-03-23
发明人: Dongho AHN , Segab KWON , Chungman KIM , Kwangmin PARK , Zhe WU , Seunggeun YU , Wonjun LEE , Jabin LEE , Jinwoo LEE
摘要: A semiconductor device includes a semiconductor substrate, a peripheral device on the semiconductor substrate, a lower insulating structure on the semiconductor substrate and covering the peripheral device, a first conductive line on the lower insulating structure, a memory cell structure on the first conductive line, and a second conductive line on the memory cell structure. The memory cell structure may include an information storage material pattern and a selector material pattern on the lower insulating structure in a vertical direction. The selector material pattern may include a first selector material layer including a first material and a second selector material layer including a second material. The second selector material layer may have a threshold voltage drift higher than that of the first material. The second selector material layer may have a second width narrower than a first width of the first selector material layer.
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公开(公告)号:US20220149114A1
公开(公告)日:2022-05-12
申请号:US17362075
申请日:2021-06-29
发明人: Kiyeon YANG , Bonwon KOO , Segab KWON , Chungman KIM , Yongyoung PARK , Dongho AHN , Seunggeun YU , Changseung LEE
摘要: Provided are a chalcogen compound having ovonic threshold switching characteristics, and a switching device, a semiconductor device, and/or a semiconductor apparatus which include the chalcogen compound. The chalcogen compound includes five or more elements and may have stable switching characteristics with a low off-current value (leakage current value). The chalcogen compound includes: selenium (Se) and tellurium (Te); a first element comprising at least one of indium (In), aluminum (Al), strontium (Sr), and calcium (Ca); and a second element including germanium (Ge) and/or tin (Sn), and may further include at least one of arsenic (As), antimony (Sb), and bismuth (Bi).
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3.
公开(公告)号:US20240177771A1
公开(公告)日:2024-05-30
申请号:US18334790
申请日:2023-06-14
发明人: Soyeon CHOI , Zhe WU , Chungman KIM , Seunggeun YU , Jabin LEE
IPC分类号: G11C13/00
CPC分类号: G11C13/0069 , G11C13/0004 , G11C13/004
摘要: An operating method of a self-selecting memory device, includes an operation of applying a first write pulse corresponding to a first state to a first memory cell during a first pulse width, and an operation of applying a second write pulse corresponding to a second state to a second memory cell during a second pulse width, wherein the first write pulse and the second write pulse have substantially opposite polarities, wherein the first pulse width is longer than the second pulse width.
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