公开(公告)号：US20210366834A1

公开(公告)日：2021-11-25

申请号：US17134602

申请日：2020-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Chul Kim ,  Sang Soo Kim ,  Yong Kwan Lee ,  Hyun Ki Kim ,  Seok Geun Ahn ,  Jun Young Oh

IPC: H01L23/538 ,  H01L23/13 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a second substrate disposed on the first semiconductor chip, a second semiconductor chip disposed on the second substrate, and a mold layer disposed between the first substrate and the second substrate. The second substrate includes a recess formed at an edge, the mold layer fills the recess, and the recess protrudes concavely inward from the edge of the second substrate toward a center of the second substrate.

公开(公告)号：US10971470B2

公开(公告)日：2021-04-06

申请号：US16511695

申请日：2019-07-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Chul Kim ,  Tae Hun Kim ,  Ji Hwan Hwang

IPC: H01L23/00 ,  H01L25/18 ,  H01L23/48

Abstract: A semiconductor package includes a first semiconductor chip including a body portion, a first bonding layer disposed on a first surface of the body portion, and through vias passing through at least a portion of the body portion; and a first redistribution portion disposed in the first semiconductor chip to be connected to the first semiconductor chip through the first bonding layer, the first redistribution portion including first redistribution layers electrically connected to the first semiconductor chip, a first wiring insulating layer disposed between the first redistribution layers, and a second bonding layer connected to the first bonding layer. The first bonding layer and the second bonding layer include first and metal pads disposed to correspond to each other and bonded to each other, respectively, and a first insulating layer and a second bonding insulating layer surrounding the first metal pads and the second metal pads, respectively.

公开(公告)号：US11545458B2

公开(公告)日：2023-01-03

申请号：US17221304

申请日：2021-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Chul Kim ,  Tae Hun Kim ,  Ji Hwan Hwang

IPC: H01L23/00 ,  H01L25/18 ,  H01L23/48 ,  H01L21/00

Abstract: A semiconductor package includes a first semiconductor chip including a first body portion, a first bonding layer including a first bonding insulating layer, a first redistribution portion including first redistribution layers, a first wiring insulating layer disposed between the first redistribution layers, and a second bonding layer including a second bonding insulating layer, a second redistribution portion including second redistribution layers, a second wiring insulating layer disposed between the second redistribution layers, and a second semiconductor chip disposed on the second redistribution portion. A lower surface of the first bonding insulating layer is bonded to an upper surface of the second bonding insulating layer, an upper surface of the first bonding insulating layer contacts the first body portion, a lower surface of the second bonding insulating layer contacts the second wiring insulating layer, and the first redistribution portion width is greater than the first semiconductor chip width.

公开(公告)号：US11450614B2

公开(公告)日：2022-09-20

申请号：US17035000

申请日：2020-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Joo Kim ,  Sun Chul Kim ,  Min Keun Kwak ,  Hyun Ki Kim ,  Hyung Gil Baek ,  Yong Kwan Lee

IPC: H01L23/48 ,  H01L23/538 ,  H01L25/10 ,  H01L25/18 ,  H01L21/48 ,  H01L23/498

Abstract: There is provided a semiconductor package capable of preventing damage to an interposer to improve reliability. The semiconductor package includes a first substrate including a first insulating layer and first conductive patterns, an interposer disposed on a top surface of the first substrate and including a second insulating layer and second conductive patterns, first connecting members in contact with the top surface of the first substrate and a bottom surface of the interposer, and supporting members including solder parts, which are in contact with the top surface of the first substrate and the bottom surface of the interposer, and core parts, which are disposed in the solder parts and include a different material from the solder parts. The first connecting members electrically connect the first conductive patterns and the second conductive patterns, and the supporting members do not electrically connect the first conductive patterns and the second conductive patterns.

公开(公告)号：US11862570B2

公开(公告)日：2024-01-02

申请号：US17891190

申请日：2022-08-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Joo Kim ,  Sun Chul Kim ,  Min Keun Kwak ,  Hyun Ki Kim ,  Hyung Gil Baek ,  Yong Kwan Lee

IPC: H01L23/48 ,  H01L23/538 ,  H01L25/10 ,  H01L25/18 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/5385 ,  H01L21/4846 ,  H01L23/49833 ,  H01L23/5389 ,  H01L25/105 ,  H01L25/18 ,  H01L23/49827 ,  H01L2225/107 ,  H01L2225/1023 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058

Abstract: There is provided a semiconductor package capable of preventing damage to an interposer to improve reliability. The semiconductor package includes a first substrate including a first insulating layer and first conductive patterns, an interposer disposed on a top surface of the first substrate and including a second insulating layer and second conductive patterns, first connecting members in contact with the top surface of the first substrate and a bottom surface of the interposer, and supporting members including solder parts, which are in contact with the top surface of the first substrate and the bottom surface of the interposer, and core parts, which are disposed in the solder parts and include a different material from the solder parts. The first connecting members electrically connect the first conductive patterns and the second conductive patterns, and the supporting members do not electrically connect the first conductive patterns and the second conductive patterns.

公开(公告)号：US11562965B2

公开(公告)日：2023-01-24

申请号：US17134602

申请日：2020-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Chul Kim ,  Sang Soo Kim ,  Yong Kwan Lee ,  Hyun Ki Kim ,  Seok Geun Ahn ,  Jun Young Oh

IPC: H01L23/538 ,  H01L23/13 ,  H01L23/31 ,  H01L21/78 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor package includes a first substrate, a first semiconductor chip disposed on the first substrate, a second substrate disposed on the first semiconductor chip, a second semiconductor chip disposed on the second substrate, and a mold layer disposed between the first substrate and the second substrate. The second substrate includes a recess formed at an edge, the mold layer fills the recess, and the recess protrudes concavely inward from the edge of the second substrate toward a center of the second substrate.