公开(公告)号：US20240136234A1

公开(公告)日：2024-04-25

申请号：US18380691

申请日：2023-10-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mingyoo CHOI ,  Jinsun Kim ,  Seunghak Park ,  Jongsu Park ,  Sunkak Jo

IPC: H01L21/66 ,  H01L21/311

CPC classification number: H01L22/12 ,  H01L21/31116

Abstract: A method of measuring an overlay offset, the method includes: providing a substrate including a lower pattern and an upper pattern, wherein the lower pattern is disposed in a cell area, and the upper pattern is disposed on the lower pattern; acquiring a first piece of overlay information about a first position of the lower pattern and a second position of the upper pattern by detecting a pupil image of a joint position that is between the upper pattern and the lower pattern; detecting an overlay offset of the second position of the upper pattern relative to the first position of the lower pattern through Zernike polynomial modeling; and acquiring compensation overlay information on the upper pattern from the overlay offset of the second position, wherein the overlay offset includes a radial tilting component.

公开(公告)号：US20220189823A1

公开(公告)日：2022-06-16

申请号：US17404136

申请日：2021-08-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongmin Kim ,  Moonjong Kang ,  Miyoun Kim ,  Sungil Moon ,  Jongsu Park ,  Heonju Lee ,  Sunkak Jo

IPC: H01L21/768 ,  H01L21/311 ,  H01L27/11582 ,  H01L27/11575

Abstract: According to example embodiments, a method of manufacturing a semiconductor device is provided. The method includes forming an etching target layer on a substrate; forming a first photoresist layer on the etching target layer; forming a first alignment key under the first photoresist layer and a first alignment pattern aligned in a first direction perpendicular to a top surface of the substrate, by exposing and developing the first photoresist layer; forming a second alignment key under the first photoresist layer and a second alignment pattern aligned in the first direction, by exposing and developing the first photoresist layer; and forming a third alignment key aligned with the first alignment key in the first direction under the first photoresist layer and a fourth alignment key aligned with the second alignment key in the first direction on the etching target layer based on the first and second alignment patterns.

公开(公告)号：US10381361B2

公开(公告)日：2019-08-13

申请号：US15455600

申请日：2017-03-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Suk Koo Hong ,  Miyeong Kang ,  Hyosung Lee ,  Kyoungyong Cho ,  Sunkak Jo

IPC: G03F7/00 ,  H01L27/11548 ,  H01L21/311 ,  H01L21/027 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/11575 ,  G03F7/038 ,  G03F7/40 ,  G03F7/004 ,  G03F7/039 ,  G03F7/075

Abstract: Embodiments of the inventive concepts provide a method for manufacturing a semiconductor device. The method includes forming a stack structure including insulating layers and sacrificial layers which are alternately and repeatedly stacked on a substrate. A first photoresist pattern is formed on the stack structure. A first part of the stack structure is etched to form a stepwise structure using the first photoresist pattern as an etch mask. The first photoresist pattern includes a copolymer including a plurality of units represented by at least one of the following chemical formulas 1 to 3, wherein “R1”, “R2”, “R3”, “p”, “q” and “r” are the same as defined in the description.

公开(公告)号：US10319735B2

公开(公告)日：2019-06-11

申请号：US15455667

申请日：2017-03-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Suk Koo Hong ,  Miyeong Kang ,  Hyosung Lee ,  Kyoungyong Cho ,  Bora Kim ,  Hyeji Kim ,  Sunkak Jo

IPC: H01L21/311 ,  H01L27/11582 ,  H01L21/28 ,  H01L27/11556 ,  G03F7/039 ,  G03F7/075 ,  G03F7/09 ,  H01L21/027 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575

Abstract: Embodiments of the inventive concept provide a method for manufacturing a semiconductor device. The method includes forming a stack structure by alternately and repeatedly stacking insulating layers and sacrificial layers on a substrate, sequentially forming a first lower layer and a first photoresist pattern on the stack structure, etching the first lower layer using the first photoresist pattern as an etch mask to form a first lower pattern. A first part of the stack structure is etched to form a stepwise structure using the first lower pattern as an etch mask. The first lower layer includes a novolac-based organic polymer, and the first photoresist pattern includes a polymer including silicon.