公开(公告)号：US20140332883A1

公开(公告)日：2014-11-13

申请号：US14089274

申请日：2013-11-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eun-Kyoung Kwon ,  Hee-Soo Kang ,  Han-Gu Kim ,  Woo-Jin Seo ,  Ki-Tae Lee ,  Jae-Gon Lee ,  Chan-Hee Jeon

IPC: H01L27/088

CPC classification number: H01L27/0886 ,  H01L27/0266 ,  H01L27/1211

Abstract: A fin-shaped active region is defined on a substrate. First and second gate electrodes crossing the fin-shaped active region are arranged. A dummy gate electrode is formed between the first and second gate electrodes. A first drain region is formed between the first gate electrode and the dummy gate electrode. A second drain region is formed between the dummy gate electrode and the second gate electrode. A source region facing the second drain region is formed. A first drain plug relatively close to the dummy gate electrode, relatively far from the second gate electrode, and connected to the second drain region is formed. The second gate electrode is arranged between the second drain region and the source region. Each of the first and second gate electrodes covers a side surface of the fin-shaped active region.

Abstract translation: 鳍状有源区限定在基底上。 布置了与鳍状有源区交叉的第一和第二栅电极。 在第一和第二栅电极之间形成虚拟栅电极。 在第一栅电极和伪栅电极之间形成第一漏区。 在虚拟栅极电极和第二栅极电极之间形成第二漏极区域。 形成面向第二漏极区域的源极区域。 形成相对靠近第二栅电极并与第二漏极区连接的虚拟栅电极的第一漏极插头。 第二栅极布置在第二漏极区域和源极区域之间。 第一和第二栅电极中的每一个覆盖鳍状有源区的侧表面。

公开(公告)号：US10020231B2

公开(公告)日：2018-07-10

申请号：US15443498

申请日：2017-02-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chan-Hee Jeon ,  Eun-Kyoung Kwon ,  Il-Ryong Kim ,  Han-Gu Kim ,  Woo-Jin Seo ,  Ki-Tae Lee

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78 ,  H01L23/535 ,  H01L21/02 ,  H01L21/768 ,  H01L21/266 ,  H01L27/02 ,  H01L27/11

CPC classification number: H01L21/823814 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/266 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/823821 ,  H01L21/823871 ,  H01L23/535 ,  H01L27/0288 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7848

Abstract: In one embodiment, the semiconductor device includes at least one active fin protruding from a substrate, a first gate electrode crossing the active fin, and a first impurity region formed on the active fin at a first side of the first gate electrode. At least a portion of the first impurity region is formed in a first epitaxial layer portion on the active fin. A second impurity region is formed on the active fin at a second side of the first gate electrode. The second impurity region has at least a portion not formed in an epitaxial layer.