公开(公告)号：US11804459B2

公开(公告)日：2023-10-31

申请号：US17009975

申请日：2020-09-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinho Park ,  Chin Kim ,  Yongseung Bang ,  Jiyeon Baek ,  Jeong Hoon Ahn

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L24/05 ,  H01L23/5226 ,  H01L24/03 ,  H01L24/13 ,  H01L23/53238 ,  H01L2224/05018 ,  H01L2224/05025 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05186 ,  H01L2224/05547 ,  H01L2224/05561 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05686 ,  H01L2224/13026

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The semiconductor device includes a first dielectric layer including a first pad, a second dielectric layer on the first dielectric layer, a through electrode that penetrates the second dielectric layer and is electrically connected to the first pad, an upper passivation layer on the second dielectric layer, a second pad on the upper passivation layer, and an upper barrier layer between the upper passivation layer and the second pad. The first pad and the through electrode include a first material. The second pad includes a second material that is different from the first material of the first pad and the through electrode. The second pad includes a first part on the upper passivation layer, and a second part that extends from the first part into the upper passivation layer and is connected to the through electrode.

公开(公告)号：US11791267B2

公开(公告)日：2023-10-17

申请号：US17340584

申请日：2021-06-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinho Park ,  Shaofeng Ding ,  Yongseung Bang ,  Jeong Hoon Ahn

IPC: H01L23/522 ,  H01L23/535 ,  H10B12/00

CPC classification number: H01L23/535 ,  H10B12/00

Abstract: A semiconductor device includes a substrate, a first electrode including a first hole, a first dielectric layer on an upper surface of the first electrode and on an inner surface of the first hole, a second electrode on the first dielectric layer, a second dielectric layer on the second electrode, a third electrode on the second dielectric layer and including a second hole, and a first contact plug extending through the second electrode and the second dielectric layer and extending through the first hole and the second hole. A sidewall of the first contact plug is isolated from direct contact with the sidewall of the first hole and a sidewall of the second hole, and has a step portion located adjacent to an upper surface of the second electrode.

公开(公告)号：US11043456B2

公开(公告)日：2021-06-22

申请号：US16660124

申请日：2019-10-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinho Park ,  Shaofeng Ding ,  Yongseung Bang ,  Jeong Hoon Ahn

IPC: H01L23/535 ,  H01L27/108

Abstract: A semiconductor device includes a substrate, a first electrode including a first hole, a first dielectric layer on an upper surface of the first electrode and on an inner surface of the first hole, a second electrode on the first dielectric layer, a second dielectric layer on the second electrode, a third electrode on the second dielectric layer and including a second hole, and a first contact plug extending through the second electrode and the second dielectric layer and extending through the first hole and the second hole. A sidewall of the first contact plug is isolated from direct contact with the sidewall of the first hole and a sidewall of the second hole, and has a step portion located adjacent to an upper surface of the second electrode.

公开(公告)号：US12142587B2

公开(公告)日：2024-11-12

申请号：US18448066

申请日：2023-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinho Park ,  Chin Kim ,  Yongseung Bang ,  Jiyeon Baek ,  Jeong Hoon Ahn

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/532

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The semiconductor device includes a first dielectric layer including a first pad, a second dielectric layer on the first dielectric layer, a through electrode that penetrates the second dielectric layer and is electrically connected to the first pad, an upper passivation layer on the second dielectric layer, a second pad on the upper passivation layer, and an upper barrier layer between the upper passivation layer and the second pad. The first pad and the through electrode include a first material. The second pad includes a second material that is different from the first material of the first pad and the through electrode. The second pad includes a first part on the upper passivation layer, and a second part that extends from the first part into the upper passivation layer and is connected to the through electrode.

公开(公告)号：US20230395541A1

公开(公告)日：2023-12-07

申请号：US18448066

申请日：2023-08-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinho Park ,  Chin Kim ,  Yongseung Bang ,  Jiyeon Baek ,  Jeong Hoon Ahn

IPC: H01L23/00 ,  H01L23/522

CPC classification number: H01L24/05 ,  H01L24/13 ,  H01L23/53238 ,  H01L23/5226 ,  H01L2224/05686 ,  H01L24/03

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The semiconductor device includes a first dielectric layer including a first pad, a second dielectric layer on the first dielectric layer, a through electrode that penetrates the second dielectric layer and is electrically connected to the first pad, an upper passivation layer on the second dielectric layer, a second pad on the upper passivation layer, and an upper barrier layer between the upper passivation layer and the second pad. The first pad and the through electrode include a first material. The second pad includes a second material that is different from the first material of the first pad and the through electrode. The second pad includes a first part on the upper passivation layer, and a second part that extends from the first part into the upper passivation layer and is connected to the through electrode.

公开(公告)号：US20250118662A1

公开(公告)日：2025-04-10

申请号：US18735507

申请日：2024-06-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dohyun Kwon ,  Sunoo Kim ,  Jonghwa Park ,  Yongseung Bang ,  Jaeheon Lee

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/00 ,  H01L23/48 ,  H01L23/522

Abstract: A semiconductor device includes a semiconductor substrate, a first insulating layer disposed on a first surface of the semiconductor substrate, a through via passing through both the semiconductor substrate and the first insulating layer, a protective barrier wall pattern disposed within the first insulating layer and on a sidewall of the through via, a first wiring structure disposed within the first insulating layer and including a first via portion and a first wiring portion, and a second insulating layer disposed on an upper surface of the first insulating layer and at least partially covering an upper surface of the first wiring structure and an upper surface of the protective barrier wall pattern.

公开(公告)号：US11114524B2

公开(公告)日：2021-09-07

申请号：US16439947

申请日：2019-06-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Shaofeng Ding ,  Jinho Park ,  Yongseung Bang ,  Jeong Hoon Ahn

IPC: H01L23/522 ,  H01L21/768 ,  H01L49/02 ,  H01L23/528 ,  H01L21/033 ,  H01L21/311 ,  H01L23/532

Abstract: A semiconductor device including a first electrode on a substrate, a second electrode on the first electrode, a first dielectric layer between the first electrode and the second electrode; a third electrode on the second electrode, a second dielectric layer between the second electrode and the third electrode, and a first contact plug penetrating the third electrode and contacting the first electrode, the first contact plug contacts a top surface of the third electrode and a side surface of the third electrode.