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公开(公告)号:US11990189B2
公开(公告)日:2024-05-21
申请号:US17839253
申请日:2022-06-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Younghwi Yang , Joonsuc Jang
CPC classification number: G11C16/3427 , G11C16/0483 , G11C16/08 , G11C16/10 , H01L24/08 , H01L25/0657 , H01L25/18 , H01L2224/08145 , H01L2924/1431 , H01L2924/14511
Abstract: A nonvolatile memory device includes at least one memory block and a control circuit. The at least one memory block includes a plurality of cell strings that are divided into a plurality of stacks disposed in the vertical direction, and each of the plurality of stacks includes at least one dummy word-line. The control circuit controls a program operation by applying a program voltage to a selected word-line of the plurality of cell strings during a program execution period and by reducing a voltage level of a dummy voltage applied to the at least one dummy word-line of at least one upper stack from among the plurality of stacks during the program execution period. The at least one upper stack is disposed at a higher position than a selected stack in the vertical direction and the selected stack from among the plurality of stacks includes the selected word-line.
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公开(公告)号:US11475972B2
公开(公告)日:2022-10-18
申请号:US17368460
申请日:2021-07-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghwi Yang , Ilhan Park , Jinyoung Kim , Sehwan Park , Dongmin Shin
Abstract: A controller includes control pins, a buffer memory, an error correction circuit, and a processor driving a read level search unit for a read operation of at least one non-volatile memory device, in which the read level search unit receives fail bit information of a sector error-corrected in the first page from the at least one non-volatile memory device when the error correction of the first read data is not possible, and searches for an optimal read level or set a soft decision offset using the fail bit information.
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公开(公告)号:US20220180957A1
公开(公告)日:2022-06-09
申请号:US17368460
申请日:2021-07-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghwi Yang , Ilhan Park , Jinyoung Kim , Sehwan Park , Dongmin Shin
Abstract: A controller includes control pins, a buffer memory, an error correction circuit, and a processor driving a read level search unit for a read operation of at least one non-volatile memory device, in which the read level search unit receives fail bit information of a sector error-corrected in the first page from the at least one non-volatile memory device when the error correction of the first read data is not possible, and searches for an optimal read level or set a soft decision offset using the fail bit information.
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