公开(公告)号：US20210293876A1

公开(公告)日：2021-09-23

申请号：US17338868

申请日：2021-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon Woo CHO ,  Yun Ju KWON ,  Sang Woo KIM

IPC: G01R31/28 ,  G06F1/3206 ,  G06F1/3209 ,  G06F1/3296 ,  G06F1/26

Abstract: A semiconductor device and a method of testing the same are provided. A semiconductor device includes a Design Under Test (DUT), a processing core configured to execute test software to determine an optimum operating voltage of the DUT, and a protection circuit configured to block the transmission of undefined signals generated by the DUT while the processing core executes the test software.

公开(公告)号：US20190214989A1

公开(公告)日：2019-07-11

申请号：US16107424

申请日：2018-08-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoo Seok SHON ,  Sang Woo KIM ,  Byung Tak LEE ,  Yun Ju KWON ,  Joon-Woo CHO

IPC: H03K19/00 ,  G06F1/06 ,  G06F1/32

Abstract: Provided are a semiconductor device and a semiconductor system. A semiconductor device includes a hardware auto clock gating (HWACG) logic configured to provide clock gating of an intellectual property (IP) block; and a memory power controller configured to perform power gating of a memory electrically connected with the IP block, based on the HWACG logic providing the clock gating for the IP block. The HWACG logic includes a first clock source configured to provide a first clock signal; a second clock source configured to receive the first clock signal provided by the first clock source, and provide a second clock signal to the IP block; a first clock control circuit configured to control the first clock source; and a second clock control circuit configured to transmit a clock request to the first clock control circuit, and control the second clock source, based on an operation state of the IP block.

公开(公告)号：US20180217202A1

公开(公告)日：2018-08-02

申请号：US15791738

申请日：2017-10-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon Woo CHO ,  Yun Ju KWON ,  Sang Woo KIM

IPC: G01R31/28 ,  G06F1/32

CPC classification number: G01R31/2853 ,  G01R31/2884 ,  G06F1/26 ,  G06F1/3206 ,  G06F1/3209 ,  G06F1/3296

Abstract: A semiconductor device and a method of testing the same are provided. A semiconductor device includes a Design Under Test (DUT), a processing core configured to execute test software to determine an optimum operating voltage of the DUT, and a protection circuit configured to block the transmission of undefined signals generated by the DUT while the processing core executes the test software.

公开(公告)号：US20150008955A1

公开(公告)日：2015-01-08

申请号：US14322498

申请日：2014-07-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Ju KWON ,  In Yup KANG

IPC: H03K19/177

CPC classification number: H03K19/17768 ,  G06F9/526 ,  G06F21/75 ,  G06F21/76

Abstract: A method and an apparatus for supporting a self-destruction function in a baseband modem are provided. A self-destruction method of a baseband modem includes sending a request for supplying power to a self-destruction unit to a power management unit when a command for performing the self-destruction is received from a base station and controlling the self-destruction unit to output a signal corresponding to a specific bit value. The signal output by the self-destruction unit is used to block a clock supplied from a Temperature-Compensated crystal Oscillator (TCXO) to the baseband modem through a logical operation with a signal output by the TCXO.

Abstract translation: 提供了一种用于支持基带调制解调器中的自毁功能的方法和装置。 基带调制解调器的自销毁方法包括当从基站接收到执行自毁的命令并且将自毁单元控制到自动破坏单元时，向电力管理单元发送向自毁单元供电的请求 输出对应于特定位值的信号。 由自毁单元输出的信号用于通过TCXO输出的信号通过逻辑运算将从温度补偿晶体振荡器（TCXO）提供的时钟阻塞到基带调制解调器。