公开(公告)号：US20230420459A1

公开(公告)日：2023-12-28

申请号：US18056181

申请日：2022-11-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byounghak Hong ,  Sooyoung Park ,  Jaehong Lee ,  Kang-ill Seo ,  WookHyun Kwon

IPC: H01L27/092 ,  H01L27/06 ,  H01L21/768

CPC classification number: H01L27/0922 ,  H01L27/0688 ,  H01L21/768

Abstract: Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a substrate and a transistor stack on the substrate. The transistor stack comprises a first transistor and a second transistor stacked in a first direction. The first transistor comprises first and second source/drain regions and a first channel region between the first and second source/drain regions, and the first source/drain region comprises a first metal layer. The second transistor comprises third and fourth source/drain regions and a second channel region between the third and fourth source/drain regions, and the first and third source/drain regions overlap each other in the first direction. The transistor stack further comprises a metal interconnector contacting the third source/drain region and the first metal layer of the first source/drain region material.

公开(公告)号：US20230361112A1

公开(公告)日：2023-11-09

申请号：US17936127

申请日：2022-09-28

Applicant: Samsung Electronics Co.; Ltd.

Inventor： BYOUNGHAK HONG ,  Gunho Jo ,  Sooyoung Park ,  Hyoeun Park ,  WookHyun Kwon ,  Jaehong Lee ,  Kang-Ill Seo

IPC: H01L27/06 ,  H01L29/06 ,  H01L29/735 ,  H01L29/861

CPC classification number: H01L27/067 ,  H01L29/0673 ,  H01L29/735 ,  H01L29/8613

Abstract: Integrated circuit devices including a bipolar junction transistor (BJT) and/or a P-N junction diode are provided. The integrated circuit devices may include a first stack including first and second semiconductor regions that are spaced apart from each other in a horizontal direction and have a first conductivity type and a plurality of nano-semiconductor layers that are stacked in a vertical direction and are between the first and second semiconductor regions. The plurality of nano-semiconductor layers each have a second conductivity type, and the first semiconductor region may include a side surface facing the plurality of nano-semiconductor layers. The integrated circuit device may also include a vertical semiconductor layer having the second conductivity type and a conductive contact that contacts the plurality of nano-semiconductor layers. The vertical semiconductor layer may contact the side surface of the first semiconductor region and the plurality of nano-semiconductor layers.