公开(公告)号：US20230326813A1

公开(公告)日：2023-10-12

申请号：US17837453

申请日：2022-06-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： BYOUNGHAK HONG ,  Wookhyun Kwon ,  Hyoeun Park ,  Kangill Seo

IPC: H01L21/66

CPC classification number: H01L22/34

Abstract: Integrated circuit devices may include a cell transistor and a parameter measuring structure (e.g., a resistance measuring structure). The cell transistor may be on a first surface of a substrate structure, which is opposite a second surface thereof. The parameter measuring structure may include first and second contact structures that extend through the substrate structure. The second surface of the substrate structure may expose respective portions of the first and second contact structures.

公开(公告)号：US12211760B2

公开(公告)日：2025-01-28

申请号：US17837453

申请日：2022-06-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byounghak Hong ,  Wookhyun Kwon ,  Hyoeun Park ,  Kangill Seo

IPC: H01L21/66

Abstract: Integrated circuit devices may include a cell transistor and a parameter measuring structure (e.g., a resistance measuring structure). The cell transistor may be on a first surface of a substrate structure, which is opposite a second surface thereof. The parameter measuring structure may include first and second contact structures that extend through the substrate structure. The second surface of the substrate structure may expose respective portions of the first and second contact structures.

公开(公告)号：US12249603B2

公开(公告)日：2025-03-11

申请号：US17570920

申请日：2022-01-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byounghak Hong ,  Seungchan Yun ,  Inchan Hwang ,  Hyoeun Park ,  Kang-ill Seo

IPC: H01L27/06 ,  H01L25/07 ,  H01L27/07 ,  H01L27/08 ,  H01L49/02

Abstract: Resistor structures of stacked devices and methods of forming the same are provided. The, resistor structures may include a substrate, an upper semiconductor layer that may be spaced apart from the substrate in a vertical direction, a lower semiconductor layer that may be between the substrate and the upper semiconductor layer, and first and second resistor contacts that may be spaced apart from each other in a horizontal direction. At least one of the upper semiconductor layer, the lower semiconductor layer, and a portion of the substrate may contact the first and second resistor contacts.

公开(公告)号：US20220311382A1

公开(公告)日：2022-09-29

申请号：US17539408

申请日：2021-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongchang Choi ,  Sungjoon Park ,  Hyoeun Park ,  Youngchang An ,  Hyotae Choo ,  Somin Lee

IPC: H03B5/12

Abstract: A variable capacitor circuit includes a capacitor block including a first varactor element comprising a first transistor having a first size, a second varactor element comprising a second transistor having a second size different from the first size, a first terminal commonly connected to a source and a drain of the first transistor, a second terminal commonly connected to a source and a drain of the second transistor, and an RC circuit connected to a gate of the first transistor and a gate of the second transistor.

公开(公告)号：US20230361112A1

公开(公告)日：2023-11-09

申请号：US17936127

申请日：2022-09-28

Applicant: Samsung Electronics Co.; Ltd.

Inventor： BYOUNGHAK HONG ,  Gunho Jo ,  Sooyoung Park ,  Hyoeun Park ,  WookHyun Kwon ,  Jaehong Lee ,  Kang-Ill Seo

IPC: H01L27/06 ,  H01L29/06 ,  H01L29/735 ,  H01L29/861

CPC classification number: H01L27/067 ,  H01L29/0673 ,  H01L29/735 ,  H01L29/8613

Abstract: Integrated circuit devices including a bipolar junction transistor (BJT) and/or a P-N junction diode are provided. The integrated circuit devices may include a first stack including first and second semiconductor regions that are spaced apart from each other in a horizontal direction and have a first conductivity type and a plurality of nano-semiconductor layers that are stacked in a vertical direction and are between the first and second semiconductor regions. The plurality of nano-semiconductor layers each have a second conductivity type, and the first semiconductor region may include a side surface facing the plurality of nano-semiconductor layers. The integrated circuit device may also include a vertical semiconductor layer having the second conductivity type and a conductive contact that contacts the plurality of nano-semiconductor layers. The vertical semiconductor layer may contact the side surface of the first semiconductor region and the plurality of nano-semiconductor layers.

公开(公告)号：US11677353B2

公开(公告)日：2023-06-13

申请号：US17539408

申请日：2021-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongchang Choi ,  Sungjoon Park ,  Hyoeun Park ,  Youngchang An ,  Hyotae Choo ,  Somin Lee

IPC: H03B5/12

CPC classification number: H03B5/1206 ,  H03B5/1253 ,  H03B2200/004 ,  H03B2200/0086

Abstract: A variable capacitor circuit includes a capacitor block including a first varactor element comprising a first transistor having a first size, a second varactor element comprising a second transistor having a second size different from the first size, a first terminal commonly connected to a source and a drain of the first transistor, a second terminal commonly connected to a source and a drain of the second transistor, and an RC circuit connected to a gate of the first transistor and a gate of the second transistor.

公开(公告)号：US20230402375A1

公开(公告)日：2023-12-14

申请号：US17849345

申请日：2022-06-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun Sung KIM ,  Hyoeun Park ,  Kang-ill Seo

IPC: H01L23/528 ,  H01L23/522 ,  H01L21/768 ,  H01L21/3213

CPC classification number: H01L23/5283 ,  H01L21/32139 ,  H01L21/76838 ,  H01L23/5226

Abstract: A interconnect structure for an integrated circuit may include: a metal line including a plurality of sections having different thicknesses along a 1st direction; and a plurality of vias respectively protruding from the plurality of sections of the metal line.

公开(公告)号：US20230135219A1

公开(公告)日：2023-05-04

申请号：US17570920

申请日：2022-01-07

Applicant: Samsung Electronics Co., Ltd

Inventor： Byounghak Hong ,  Seungchan Yun ,  Inchan Hwang ,  Hyoeun Park ,  Kang-ill Seo

IPC: H01L27/07 ,  H01L27/08 ,  H01L27/06 ,  H01L49/02 ,  H01L25/07

Abstract: Resistor structures of stacked devices and methods of forming the same are provided. The, resistor structures may include a substrate, an upper semiconductor layer that may be spaced apart from the substrate in a vertical direction, a lower semiconductor layer that may be between the substrate and the upper semiconductor layer, and first and second resistor contacts that may be spaced apart from each other in a horizontal direction. At least one of the upper semiconductor layer, the lower semiconductor layer, and a portion of the substrate may contact the first and second resistor contacts.