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    Diode having reduced on-resistance and associated method of manufacture
    1.
    发明授权
    Diode having reduced on-resistance and associated method of manufacture 有权
    二极管具有降低的导通电阻和相关的制造方法

    公开(公告)号：US08138583B2

    公开(公告)日：2012-03-20

    申请号：US11675658

    申请日：2007-02-16

    申请人： Saptharishi Sriram ,  Thomas J. Smith, Jr. ,  Helmut Hagleitner

    发明人： Saptharishi Sriram ,  Thomas J. Smith, Jr. ,  Helmut Hagleitner

    IPC分类号： H01L29/15

    CPC分类号： H01L29/1608 ,  H01L23/291 ,  H01L23/31 ,  H01L29/0657 ,  H01L29/6606 ,  H01L29/6609 ,  H01L29/861 ,  H01L29/868 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A diode structure having a reduced on-resistance in the forward-biased condition includes semiconductor layers, preferably of silicon carbide. The anode and cathode of the device are located on the same side of the bottom semiconductor layer, providing lateral conduction across the diode body. The anode is positioned on a semiconductor mesa, and the sides of the mesa are covered with a nonconductive spacer extending from the anode to the bottom layer. An ohmic contact, preferably a metal silicide, covers the surface of the bottom layer between the spacer material and the cathode. The conductive path extends from anode to cathode through the body of the mesa and across the bottom semiconductor layer, including the ohmic contact. The method of forming the diode includes reacting layers of silicon and metal on the appropriate regions of the diode to form an ohmic contact of metal silicide.

    摘要翻译： 在正向偏置状态下具有降低的导通电阻的二极管结构包括优选为碳化硅的半导体层。 器件的阳极和阴极位于底部半导体层的同一侧，提供横跨二极管体的横向导通。 阳极定位在半导体台面上，并且台面的侧面被从阳极延伸到底层的非导电间隔物覆盖。 欧姆接触，优选金属硅化物，覆盖在间隔物材料和阴极之间的底层的表面。 导电路径从阳极延伸穿过台面的主体并穿过底部半导体层，包括欧姆接触。 形成二极管的方法包括在二极管的适当区域上反应硅和金属层以形成金属硅化物的欧姆接触。

    Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides
    3.
    发明申请
    Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides 有权
    使用无氢溅射氮化物钝化宽带隙基半导体器件

    公开(公告)号：US20070001174A1

    公开(公告)日：2007-01-04

    申请号：US11169378

    申请日：2005-06-29

    申请人： Zoltan Ring ,  Helmut Hagleitner ,  Jason Henning ,  Andrew Mackenzie ,  Scott Allen ,  Scott Sheppard ,  Richard Smith ,  Saptharishi Sriram ,  Allan Ward

    发明人： Zoltan Ring ,  Helmut Hagleitner ,  Jason Henning ,  Andrew Mackenzie ,  Scott Allen ,  Scott Sheppard ,  Richard Smith ,  Saptharishi Sriram ,  Allan Ward

    IPC分类号： H01L29/15 ,  H01L31/0256

    CPC分类号： H01L21/045 ,  H01L21/3145 ,  H01L21/318 ,  H01L21/3185 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/24

    摘要： A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.

    摘要翻译： 公开了钝化的半导体结构和相关方法。 该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层，用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层，用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层，用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层，用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层，用于在封装层上进行步骤覆盖和防裂。

    SCHOTTKY CONTACT
    4.
    发明申请
    SCHOTTKY CONTACT 有权
    肖特友联系人

    公开(公告)号：US20130234278A1

    公开(公告)日：2013-09-12

    申请号：US13414286

    申请日：2012-03-07

    申请人： Helmut Hagleitner ,  Saptharishi Sriram

    发明人： Helmut Hagleitner ,  Saptharishi Sriram

    IPC分类号： H01L29/47 ,  H01L21/28

    CPC分类号： H01L29/475 ,  H01L21/28581 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/452 ,  H01L29/7786 ,  H01L29/872

    摘要： The present disclosure relates to a Schottky contact for a semiconductor device. The semiconductor device has a body formed from one or more epitaxial layers, which reside over a substrate. The Schottky contact may include a Schottky layer, a first diffusion barrier layer, and a third layer. The Schottky layer is formed of a first metal and is provided over at least a portion of a first surface of the body. The first diffusion barrier layer is formed of a silicide of the first metal and is provided over the Schottky layer. The third layer is formed of a second metal and is provided over the first diffusion barrier layer. In one embodiment, the first metal is nickel, and as such, the silicide is nickel silicide. Various other layers may be provided between or above the Schottky layer, the first diffusion barrier layer, and the third layer.

    摘要翻译： 本公开涉及半导体器件的肖特基接触。 半导体器件具有由位于衬底上的一个或多个外延层形成的主体。 肖特基接触可以包括肖特基层，第一扩散阻挡层和第三层。 肖特基层由第一金属形成并且设置在主体的第一表面的至少一部分上。 第一扩散阻挡层由第一金属的硅化物形成，并且设置在肖特基层上。 第三层由第二金属形成，并且设置在第一扩散阻挡层上。 在一个实施例中，第一金属是镍，因此硅化物是硅化镍。 可以在肖特基层，第一扩散阻挡层和第三层之间或之上提供各种其它层。

    Diode Having Reduced On-resistance and Associated Method of Manufacture
    6.
    发明申请
    Diode Having Reduced On-resistance and Associated Method of Manufacture 有权
    二极管具有降低的导通电阻和相关的制造方法

    公开(公告)号：US20080197360A1

    公开(公告)日：2008-08-21

    申请号：US11675658

    申请日：2007-02-16

    申请人： Saptharishi Sriram ,  Thomas J. Smith ,  Helmut Hagleitner

    发明人： Saptharishi Sriram ,  Thomas J. Smith ,  Helmut Hagleitner

    IPC分类号： H01L29/868 ,  H01L21/329 ,  H01L29/24

    CPC分类号： H01L29/1608 ,  H01L23/291 ,  H01L23/31 ,  H01L29/0657 ,  H01L29/6606 ,  H01L29/6609 ,  H01L29/861 ,  H01L29/868 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A diode structure having a reduced on-resistance in the forward-biased condition includes semiconductor layers, preferably of silicon carbide. The anode and cathode of the device are located on the same side of the bottom semiconductor layer, providing lateral conduction across the diode body. The anode is positioned on a semiconductor mesa, and the sides of the mesa are covered with a nonconductive spacer extending from the anode to the bottom layer. An ohmic contact, preferably a metal silicide, covers the surface of the bottom layer between the spacer material and the cathode. The conductive path extends from anode to cathode through the body of the mesa and across the bottom semiconductor layer, including the ohmic contact. The method of forming the diode includes reacting layers of silicon and metal on the appropriate regions of the diode to form an ohmic contact of metal silicide.

    摘要翻译： 在正向偏置状态下具有降低的导通电阻的二极管结构包括优选为碳化硅的半导体层。 器件的阳极和阴极位于底部半导体层的同一侧，提供横跨二极管体的横向导通。 阳极定位在半导体台面上，并且台面的侧面被从阳极延伸到底层的非导电间隔物覆盖。 欧姆接触，优选金属硅化物，覆盖在间隔物材料和阴极之间的底层的表面。 导电路径从阳极延伸穿过台面的主体并穿过底部半导体层，包括欧姆接触。 形成二极管的方法包括在二极管的适当区域上反应硅和金属层以形成金属硅化物的欧姆接触。

    High power gallium nitride field effect transistor switches
    9.
    发明授权
    High power gallium nitride field effect transistor switches 有权
    大功率氮化镓场效应晶体管开关

    公开(公告)号：US08421122B2

    公开(公告)日：2013-04-16

    申请号：US13110573

    申请日：2011-05-18

    申请人： Thomas J. Smith, Jr. ,  Matthew Wills ,  Saptharishi Sriram

    发明人： Thomas J. Smith, Jr. ,  Matthew Wills ,  Saptharishi Sriram

    IPC分类号： H01L29/66 ,  H01L31/0256

    CPC分类号： H03K17/693 ,  H01L23/645 ,  H01L27/0207 ,  H01L27/0605 ,  H01L27/088 ,  H01L2223/6683 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A monolithic high power radio frequency switch includes a substrate, and first and second gallium nitride high electron mobility transistors on the substrate. Each of the first and second gallium nitride high electron mobility transistors includes a respective source, drain and gate terminal. The source terminal of the first gallium nitride high electron mobility transistor is coupled to the drain terminal of the second gallium nitride high electron mobility transistor, and the source terminal of the second gallium nitride high electron mobility transistor is coupled to ground. An RF input pad is coupled to the drain terminal of the first second gallium nitride high electron mobility transistor, an RF output pad is coupled to the source terminal of the first gallium nitride high electron mobility transistor and the drain terminal of the second gallium nitride high electron mobility transistor, and a control pad is coupled to the gate of the first gallium nitride high electron mobility transistor.

    摘要翻译： 单片高功率射频开关包括衬底，以及衬底上的第一和第二氮化镓高电子迁移率晶体管。 第一和第二氮化镓高电子迁移率晶体管中的每一个包括相应的源极，漏极和栅极端子。 第一氮化镓高电子迁移率晶体管的源极端子耦合到第二氮化镓高电子迁移率晶体管的漏极端子，并且第二氮化镓高电子迁移率晶体管的源极端子接地。 RF输入焊盘耦合到第一第二氮化镓高电子迁移率晶体管的漏极端子，RF输出焊盘耦合到第一氮化镓高电子迁移率晶体管的源极端子和第二氮化镓高电子迁移率晶体管的漏极端子 电子迁移率晶体管和控制焊盘耦合到第一氮化镓高电子迁移率晶体管的栅极。

    Methods of fabricating transistors having buried P-type layers coupled to the gate
    10.
    发明授权
    Methods of fabricating transistors having buried P-type layers coupled to the gate 有权
    制造具有连接到栅极的P型层的晶体管的方法

    公开(公告)号：US07943972B2

    公开(公告)日：2011-05-17

    申请号：US12627743

    申请日：2009-11-30

    申请人： Saptharishi Sriram ,  Matt Willis

    发明人： Saptharishi Sriram ,  Matt Willis

    IPC分类号： H01L29/812 ,  H01L21/338

    CPC分类号： H01L29/8128 ,  H01L29/1029 ,  H01L29/1066 ,  H01L29/808

    摘要： A unit cell of a metal-semiconductor field-effect transistor (MESFET) is provided. The MESFET has a source, a drain and a gate. The gate is between the source and the drain and on an n-type conductivity channel layer. A p-type conductivity region is provided beneath the gate between the source and the drain. The p-type conductivity region is spaced apart from the n-type conductivity channel layer and electrically coupled to the gate. Related methods are also provided herein.

    摘要翻译： 提供了一种金属半导体场效应晶体管（MESFET）的晶胞。 MESFET具有源极，漏极和栅极。 栅极在源极和漏极之间以及n型导电沟道层之间。 在源极和漏极之间的栅极下方提供p型导电区域。 p型导电区域与n型导电沟道层间隔开并电耦合到栅极。 本文还提供了相关方法。