公开(公告)号：US06333932B1

公开(公告)日：2001-12-25

申请号：US08518110

申请日：1995-08-21

Applicant: Yasusi Kobayasi ,  Yoshihiro Watanabe ,  Hiroshi Nishida ,  Masami Murayama ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Hiromi Yamanaka ,  Jin Abe ,  Yoshihisa Tsuruta ,  Yoshiharu Kato ,  Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Eiji Ishioka ,  Shigeru Sekine ,  Yoshiyuki Karakawa ,  Atsushi Kagawa ,  Mikio Nakayama ,  Miyuki Kawataka ,  Satoshi Esaka ,  Nobuyuki Tsutsui ,  Fumio Hirase ,  Atsuko Suzuki ,  Shouji Kohira ,  Kenichi Okabe ,  Takashi Hatano ,  Yasuhiro Nishikawa ,  Jun Itoh ,  Shinichi Araya

Inventor： Yasusi Kobayasi ,  Yoshihiro Watanabe ,  Hiroshi Nishida ,  Masami Murayama ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Hiromi Yamanaka ,  Jin Abe ,  Yoshihisa Tsuruta ,  Yoshiharu Kato ,  Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Eiji Ishioka ,  Shigeru Sekine ,  Yoshiyuki Karakawa ,  Atsushi Kagawa ,  Mikio Nakayama ,  Miyuki Kawataka ,  Satoshi Esaka ,  Nobuyuki Tsutsui ,  Fumio Hirase ,  Atsuko Suzuki ,  Shouji Kohira ,  Kenichi Okabe ,  Takashi Hatano ,  Yasuhiro Nishikawa ,  Jun Itoh ,  Shinichi Araya

IPC: H04Q1104

CPC classification number: H04L5/16 ,  H04L2012/5628 ,  H04L2012/5645 ,  H04L2012/5652 ,  H04Q11/0478

Abstract: The quality and performance of the connectionless communications system are improved. When a BOM is received, the destination address DA of the L3-PDU stored in the payload of the BOM is retrieved, and the tag information is obtained from the DA (S11). The output message identifier MID is reserved (S12), and the tag information and output MID are assigned to the BOM (S13). Then, the tag information and output MID are written to the table. When a COM is received, the tag information and output MID are retrieved using the MID of the COM as a key, and the information is provided for the COM (S31 and S32). When an EOM is received, the tag information and output MID are retrieved using the MID of the EOM as a key, and the information is provided for the EOM (S41 and S42). Then, the output MID is released (S43).

Abstract translation: 无连接通信系统的质量和性能得到提高。 当接收到BOM时，检索存储在BOM的有效载荷中的L3-PDU的目的地地址DA，并从DA获得标签信息（S11）。 输出消息标识符MID被保留（S12），标签信息和输出MID被分配给BOM（S13）。 然后，将标签信息和输出MID写入表中。 当接收到COM时，使用COM的MID作为密钥检索标签信息和输出MID，并为COM提供信息（S31和S32）。 当接收到EOM时，使用EOM的MID作为密钥检索标签信息和输出MID，并且为EOM提供信息（S41和S42）。 然后，释放输出MID（S43）。

公开(公告)号：US6078585A

公开(公告)日：2000-06-20

申请号：US619966

申请日：1996-03-20

Applicant: Satoshi Kakuma ,  Shiro Uriu

Inventor： Satoshi Kakuma ,  Shiro Uriu

IPC: H04Q3/00 ,  H04L12/931 ,  H04L12/933 ,  H04L12/937 ,  H04Q1/04 ,  H04Q3/68 ,  H04L12/56

CPC classification number: H04L12/5601 ,  H04L49/106 ,  H04L49/1553 ,  H04L49/255 ,  H04L49/455 ,  H04Q3/68

Abstract: Four SR modules are provided in the second stage of a 3-stage MSSR switch. To guarantee the MSSR switch the capacity of 20 Gbps, SR modules are provided in each of the first and third stages of the switch. When the capacity of the MSSR switch is extended from 20 Gbps to 40 Gbps, SR modules are added to both of the first and third stages and connected to the four SR modules in the second stage. To further extend the capacity of the MSSR switch to 60 or 80 Gbps, the SR modules are sequentially added to the first and third stages, and the newly provided SR modules are connected to the four SR modules in the second stage.

Abstract translation: 在三级MSSR开关的第二级提供四个SR模块。 为了保证MSSR的交换容量为20Gbps，SR模块在交换机的第一和第三级提供。 当MSSR交换机的容量从20Gbps扩展到40Gbps时，SR模块将被添加到第一和第三级，并连接到第二级的四个SR模块。 为了进一步将MSSR交换机的容量扩展到60G或80Gbps，SR模块依次添加到第一级和第三级，新提供的SR模块连接到第二级的四个SR模块。

公开(公告)号：US5691977A

公开(公告)日：1997-11-25

申请号：US580534

申请日：1995-12-29

Applicant: Shuji Yoshimura ,  Satoshi Kakuma ,  Masami Murayama ,  Shiro Uriu ,  Tadashi Hoshino

Inventor： Shuji Yoshimura ,  Satoshi Kakuma ,  Masami Murayama ,  Shiro Uriu ,  Tadashi Hoshino

IPC: H04M3/00 ,  H04L12/28 ,  H04L12/70 ,  H04Q3/00 ,  H04Q11/04 ,  H04L12/56

CPC classification number: H04Q11/0478 ,  H04L49/3081 ,  H04L2012/5614 ,  H04L2012/5619

Abstract: In a data access device for writing into or read from a data conversion table on the basis of a clock signal extracted from a cell being transferred over a line, a clock signal generator of the invention generates a second clock signal which differs from the first clock signal extracted from an incoming cell. A write/read control unit writes data into or reads data for maintenance from the data conversion table on the basis of either the first clock signal or the second clock signal when the line is normal. In the event of the occurrence of a failure in the line, on the other hand, the write/read control circuit permits the data conversion table to be written into or read from for maintenance on the basis of the second clock signal.

Abstract translation: 本发明的时钟信号发生器根据从通过线路传输的单元提取的时钟信号写入数据转换表或从数据转换表读取数据存取装置，产生与第一时钟不同的第二时钟信号 从进入的小区提取的信号。 写入/读取控制单元在线路正常时，基于第一时钟信号或第二时钟信号，将数据写入数据转换表或从数据转换表读取数据进行维护。 另一方面，在线路中出现故障的情况下，写入/读取控制电路允许数据转换表基于第二时钟信号写入或读取以进行维护。

公开(公告)号：US5602826A

公开(公告)日：1997-02-11

申请号：US565048

申请日：1995-11-30

Applicant: Shuji Yoshimura ,  Shiro Uriu ,  Satoshi Kakuma

Inventor： Shuji Yoshimura ,  Shiro Uriu ,  Satoshi Kakuma

IPC: H04L12/56 ,  H04Q11/04 ,  H04J3/14

CPC classification number: H04Q11/0478 ,  H04L2012/5628 ,  H04L2012/5652

Abstract: A test system exactly checks the integrity of data in an ATM system, and generates a test cell of a desired band. In the first aspect of the system in which data stored in an ATM cell are transmitted in an 8-bit parallel format in the ATM system, a test cell generating device connected to an input line outputs a test cell having 1 in all of the eight bits or having zero in all of the eight bits, and the test cell confirming device connected to an output line of the ATM switch detects the above described data. In the second aspect, the test cell generating device provided in an input trunk outputs a test cell of a desired band based on a ratio between two optional integers N and n (N.gtoreq.n), the state of a buffer of the ATM switch is monitored, and a load test is conducted to determine whether or not any cell has been destroyed.

Abstract translation: 测试系统精确地检查ATM系统中数据的完整性，并生成所需频段的测试单元。 在ATM系统中以8比特并行格式发送存储在ATM信元中的数据的系统的第一方面中，连接到输入线的测试单元生成装置输出具有1个全部八个的测试单元 位或在所有八位中具有零，并且连接到ATM交换机的输出线的测试单元确认装置检测上述数据。 在第二方面，提供在输入中继线中的测试单元产生装置基于两个可选整数N和n（N> / = n）之间的比率输出所需频带的测试单元，ATM的缓冲器的状态 监控开关，并进行负载测试，以确定任何电池是否已被破坏。

公开(公告)号：US5555265A

公开(公告)日：1996-09-10

申请号：US332379

申请日：1994-10-31

Applicant: Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Kazuo Hajikano

Inventor： Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Kazuo Hajikano

IPC: H04Q3/00 ,  H04L12/813 ,  H04L12/815 ,  H04L12/863 ,  H04L12/911 ,  H04L12/931 ,  H04L12/56

CPC classification number: H04L49/505 ,  H04L12/5693 ,  H04L47/10 ,  H04L47/522 ,  H04L47/6215 ,  H04L49/205 ,  H04L49/3009 ,  H04L49/3081 ,  H04L49/9036 ,  H04L49/9078 ,  H04L2012/5651 ,  H04L2012/5672 ,  H04L2012/5681 ,  H04L49/253 ,  H04L49/30

Abstract: A switching path setting system is disposed between an input line connected to switching equipment and a switch. An input interface device allocates a cell to a quality class as tag information corresponding to an identifier of the cell. A quality class buffer stores the cell corresponding to the quality class allocated by the input interface device corresponding to the quality class. A cell is read from the quality class buffer at a band allocated to each quality class.

Abstract translation: 开关路径设定系统设置在与开关装置连接的输入线与开关之间。 输入接口设备将小区分配给质量类作为与小区的标识符相对应的标签信息。 质量类缓冲器存储与由质量等级对应的由输入接口设备分配的质量等级对应的单元。 在分配给每个质量等级的频带上从质量等级缓冲器读取单元。

公开(公告)号：US5408461A

公开(公告)日：1995-04-18

申请号：US215313

申请日：1994-03-21

Applicant: Shiro Uriu ,  Satoshi Kakuma ,  Shuji Yoshimura

Inventor： Shiro Uriu ,  Satoshi Kakuma ,  Shuji Yoshimura

IPC: H04L29/14 ,  H04L12/70 ,  H04J3/14 ,  H04L1/24 ,  H04L12/26

CPC classification number: H04L49/3009 ,  H04L49/3081 ,  H04L49/309 ,  H04L49/555 ,  H04L2012/5628 ,  H04L49/30

Abstract: An ATM transmission system transmits cell-formatted data in an asynchronous transfer mode, and aims at conducting an online path route test in the system. If one path route only is established in the system, then one or more valid cell detecting units for detecting, upon receipt of a cell enable signal indicating that a valid cell to pass through the path route has been sent, the arrival of a valid cell are provided at an optional point including an ATM switch in the path route so that the path route can be partially or entirely validity-checked. If plurality of valid path routes are established, the system provides, in addition to the valid cell detecting units, a virtual path identifier and virtual channel identifier comparing unit for comparing values of the VPI and VCI stored therein with values of a VPI and a VCI added to an arriving cell, and a path route validity check unit for partially or entirely validity-checking a path route in the ATM transmission system.

Abstract translation: ATM传输系统以异步传输模式发送小区格式数据，目的是在系统中进行在线路径测试。 如果仅在系统中建立一个路径路径，则一个或多个有效的小区检测单元在接收到指示通过路径路由的有效小区的小区启用信号已被发送时，检测有效小区的到达 被提供在包括路由路由中的ATM交换机的可选点处，使得可以部分地或完全地进行有效性检查。 如果建立了多个有效的路径路由，则除了有效的小区检测单元之外，系统还提供虚拟路径标识符和虚拟信道标识符比较单元，用于比较其中存储的VPI和VCI的值与VPI和VCI的值 以及路由有效性检查单元，用于部分或全部有效性地检查ATM传输系统中的路径路径。

公开(公告)号：US5295134A

公开(公告)日：1994-03-15

申请号：US853257

申请日：1992-03-18

Applicant: Shuji Yoshimura ,  Satoshi Kakuma ,  Shiro Uriu ,  Naoyuki Izawa

Inventor： Shuji Yoshimura ,  Satoshi Kakuma ,  Shiro Uriu ,  Naoyuki Izawa

IPC: H04M3/22 ,  H04Q3/545 ,  H04Q11/04 ,  H04L12/26

CPC classification number: H04L12/5601 ,  H04L49/106 ,  H04L49/255 ,  H04L49/3081 ,  H04L49/309 ,  H04Q11/0478 ,  H04L2012/5627 ,  H04L2012/5681

Abstract: An in-service activator for a broadband exchanger has a dual system structure, in which a first system and a second system form a dual pair. The first system and the second system in the dual pair each has at least one [1] channel converter and a switcher. A channel converter stores channel setting information for use in routing a cell inputted from a line, and outputs the cell inputted from the line by attaching the channel setting information to the cell. The switcher switches a cell outputted from a channel converter. The interfacer stores, in a channel converter of a to-be-activated standby system in the dual pair, the channel setting information read from the corresponding channel converter of an act system in the duplex pair.

Abstract translation: 用于宽带交换机的在线激活器具有双系统结构，其中第一系统和第二系统形成双对。 双对中的第一系统和第二系统每个具有至少一个（1）信道转换器和切换器。 通道转换器存储用于路由从一行输入的单元的通道设置信息，并且通过将通道设置信息附加到该单元来输出从该行输入的单元。 切换器切换从信道转换器输出的单元。 该接口在双对中的待激活待机系统的信道转换器中存储从双工对中的动作系统的相应信道转换器读取的信道设置信息。

公开(公告)号：US07551612B2

公开(公告)日：2009-06-23

申请号：US09277213

申请日：1999-03-26

Applicant: Yasusi Kobayashi ,  Yoshihiro Watanabe ,  Hiroshi Nishida ,  Masami Murayama ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Hiromi Yamanaka ,  Jin Abe ,  Yoshihisa Tsuruta ,  Yoshiharu Kato ,  Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Eiji Ishioka ,  Shigeru Sekine ,  Yoshiyuki Karakawa ,  Atsushi Kagawa ,  Mikio Nakayama ,  Miyuki Kawataka ,  Satoshi Esaka ,  Nobuyuki Tsutsui ,  Fumio Hirase ,  Atsuko Suzuki ,  Shouji Kohira ,  Kenichi Okabe ,  Takashi Hatano ,  Yasuhiro Nishikawa ,  Jun Itoh ,  Shinichi Araya

Inventor： Yasusi Kobayashi ,  Yoshihiro Watanabe ,  Hiroshi Nishida ,  Masami Murayama ,  Naoyuki Izawa ,  Yasuhiro Aso ,  Yoshihiro Uchida ,  Hiromi Yamanaka ,  Jin Abe ,  Yoshihisa Tsuruta ,  Yoshiharu Kato ,  Satoshi Kakuma ,  Shiro Uriu ,  Noriko Samejima ,  Eiji Ishioka ,  Shigeru Sekine ,  Yoshiyuki Karakawa ,  Atsushi Kagawa ,  Mikio Nakayama ,  Miyuki Kawataka ,  Satoshi Esaka ,  Nobuyuki Tsutsui ,  Fumio Hirase ,  Atsuko Suzuki ,  Shouji Kohira ,  Kenichi Okabe ,  Takashi Hatano ,  Yasuhiro Nishikawa ,  Jun Itoh ,  Shinichi Araya

IPC: H04L12/66

CPC classification number: H04L5/16 ,  H04L2012/5628 ,  H04L2012/5645 ,  H04L2012/5652 ,  H04Q11/0478

Abstract: A switch station including an ATM switch; a memory storing control data for operations of the switch station; an intra-station device, accommodating a subscriber line, performing communication operation on subscriber ATM cell; a control processor generating control information in link access protocol (LAP) format; and an interface unit converting LAP control information into ATM cell to the intra-station device through the ATM switch, wherein the control information is communicated according to LAP, the intra-station device receives the control information and transmits a direct memory access request to obtain control data stored in the memory, the interface unit obtains and converts the data format of the control data into ATM cell to transmit to the intra-station device through the switch, and the intra-station device performs the communication operation on the subscriber ATM cell based on the control data received through the switch.

Abstract translation: 包括ATM交换机的交换台; 存储用于所述开关站的操作的控制数据的存储器; 站内设备，容纳用户线路，对用户ATM信元进行通信操作; 控制处理器生成链路接入协议（LAP）格式的控制信息; 以及接口单元，其通过ATM交换机将LAP控制信息转换为ATM信元到站内设备，其中根据LAP传送控制信息，站内设备接收控制信息并发送直接存储器访问请求以获得 存储在存储器中的控制数据，接口单元获取控制数据的数据格式并将其转换成ATM信元，通过交换机发送到站内设备，并且站内设备对用户ATM信元进行通信操作 基于通过交换机接收的控制数据。

公开(公告)号：US5636222A

公开(公告)日：1997-06-03

申请号：US565316

申请日：1995-11-30

Applicant: Shiro Uriu ,  Shuji Yoshimura ,  Satoshi Kakuma

Inventor： Shiro Uriu ,  Shuji Yoshimura ,  Satoshi Kakuma

IPC: H04M3/42 ,  H04L12/18 ,  H04M3/56 ,  H04L12/56

CPC classification number: H04L12/5601 ,  H04L12/18 ,  H04L49/101 ,  H04L49/106 ,  H04L49/203 ,  H04L49/309 ,  H04L2012/5627 ,  H04L2012/5652 ,  H04L2012/5674

Abstract: When broadcast is executed in an ATM mode, a subscriber is assigned a path and a channel as information by a central controller of a switching unit, and the information is added to a cell to be transmitted to the switching unit through a subscriber line. The switching unit comprises the central controller, a tag information adder, and a self-routing switch. The self-routing switch comprises a plurality of input lines and output lines, and unit switches provided for each input line corresponding to each of the output lines. The tag information adder adds routing information for the self-routing switch to a cell to be transmitted to the self-routing switching. The routing information comprises a set of bits corresponding to each output line, and the tag information adder adds to the cell the routing information in which a bit corresponding to an output line for transmitting the cell is set to a predetermined logical value. In executing the broadcast, a plurality of bits corresponding to a plurality of output lines are set to a predetermined logical value. The self-routing switch analyzes the routing information of the cell received by each unit switch, and outputs the cell to the outpost line if the bit corresponding to a unit switch is set to a predetermined logical value. If a plurality of bits of routing information are set to a predetermined value, the cell is outputted from a plurality of output lines, thus enabling the broadcast.

Abstract translation: 当以ATM模式执行广播时，由切换单元的中央控制器向用户分配路径和信道作为信息，并且通过用户线路将信息添加到要发送到交换单元的小区。 切换单元包括中央控制器，标签信息加法器和自路由交换机。 自路由开关包括多个输入线和输出线，以及为每条输出线对应的每个输入线提供单元开关。 标签信息加法器将自路由交换机的路由信息​​添加到要发送到自路由交换的信元。 路由信息包括与每条输出线对应的一组比特，标签信息加法器向小区添加与发送小区的输出线相对应的比特被设定为规定的逻辑值的路由信息​​。 在执行广播时，将与多个输出行相对应的多个位设置为预定的逻辑值。 自路由交换机分析每个单元交换机接收到的小区的路由信息​​，并且如果与单位交换机相对应的位被设置为预定的逻辑值，则将该小区输出到前哨线。 如果路由信息的多个比特被设置为预定值，则从多个输出线输出小区，从而能够进行广播。

公开(公告)号：US5561662A

公开(公告)日：1996-10-01

申请号：US210149

申请日：1994-03-17

Applicant: Satoshi Kakuma ,  Kazuo Hajikano ,  Masami Murayama ,  Shuji Yoshimura ,  Shiro Uriu ,  Jin Abe

Inventor： Satoshi Kakuma ,  Kazuo Hajikano ,  Masami Murayama ,  Shuji Yoshimura ,  Shiro Uriu ,  Jin Abe

IPC: H04L12/46 ,  H04L12/70 ,  H04Q11/04 ,  H04L12/56 ,  H04L12/26

CPC classification number: H04L49/105 ,  H04L49/3081 ,  H04Q11/0478 ,  H04L2012/5615 ,  H04L2012/5645

Abstract: A switch interface unit, a monitor unit, and a control system interface unit are connected as external units to a highway to which a subscriber information processing unit is also connected so that a monitoring process, that is, a special study process, can be simplified and a cost charged for the subscriber information processing unit can be prevented from increasing greatly. Furthermore, in an accounting process, accounting parameters are accumulated in an accounting information accumulating unit for variations on compressed source addresses, not on source addresses. As a result, the accounting information accumulating unit, etc. can be realized with normal circuit elements only.

Abstract translation: 开关接口单元，监视单元和控制系统接口单元作为外部单元连接到用户信息处理单元也连接到的高速公路，从而可以简化监视处理，即特殊研究过程 并且可以防止为用户信息处理单元收取的费用大大增加。 此外，在计费处理中，计费参数累积在计费信息累积单元中，用于压缩源地址的变化，而不是源地址。 结果，会计信息存储单元等只能用普通电路元件实现。