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公开(公告)号：US20190190448A1
公开(公告)日：2019-06-20
申请号：US16219995
申请日：2018-12-14
发明人： Hideo HANEDA , Akio TSUTSUMI
摘要： A circuit device includes a drive circuit driving a resonator, an oscillation circuit having the resonator and a variable capacitance circuit coupled to an oscillation loop including the drive circuit, and a D/A converter circuit that performs D/A conversion on frequency control data and outputs a first voltage signal and a second voltage signal which are differential signals. The variable capacitance circuit includes a first variable capacitance capacitor, to one end of which the first voltage signal is input and, to the other end of which a first bias voltage is input and a second variable capacitance capacitor, to one end of which the second voltage signal is input and, to the other end of which a second bias voltage is input.
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公开(公告)号：US20190033431A1
公开(公告)日：2019-01-31
申请号：US16045899
申请日：2018-07-26
发明人： Hideo HANEDA , Akio TSUTSUMI
摘要： A circuit device includes an analog front-end circuit that receives a target signal is input, and a processing circuit that performs arithmetic processing based on an output signal from the analog front-end circuit. The analog front-end circuit includes a plurality of comparator circuits that compare the voltage level of the target signal to a plurality of threshold voltages and output a plurality of comparison result signals. The processing circuit obtains the transition timing of the target signal based on the comparison result signals and delayed-time information of the analog front-end circuit.
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公开(公告)号：US20210194428A1
公开(公告)日：2021-06-24
申请号：US17124868
申请日：2020-12-17
发明人： Hideo HANEDA , Yasuhiro SUDO , Akio TSUTSUMI
摘要： An oscillator includes a resonator, a clock signal generation circuit, a clock signal output terminal, an external signal input terminal, an interface circuit, and an interface terminal. The clock signal generation circuit oscillates the resonator to generate a clock signal. The clock signal output terminal outputs the clock signal. An external signal is input to the external signal input terminal. The interface circuit outputs time difference information obtained by measuring a time difference between a transition timing of a first signal based on the external signal input from the external signal input terminal and a transition timing of a second signal based on the clock signal, or frequency information obtained by measuring a frequency of a first clock signal, which is one of the clock signal and the external clock signal, based on a frequency of a second clock signal, which is the other of the clock signal and the external clock signal. The interface terminal is coupled to the interface circuit.
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公开(公告)号：US20190035848A1
公开(公告)日：2019-01-31
申请号：US16046098
申请日：2018-07-26
发明人： Atsushi TANAKA , Akio TSUTSUMI , Fumikazu KOMATSU
IPC分类号： H01L27/20 , H01L41/053 , H03H9/13 , H01L41/047 , H03L7/085 , H03L7/099 , H03L1/02 , H03H9/205 , H03H9/05 , H03B5/04 , H03B5/32 , G01D5/14
摘要： A resonator device includes a first resonator that generates a reference clock signal, a second resonator that generates a first clock signal having a frequency adjusted based on the reference clock signal, and a circuit device that includes a temperature sensor for performing temperature compensation on an oscillation frequency of the first resonator. The temperature sensor is disposed on the circuit device such that the first resonator overlaps the temperature sensor in a plan view.
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公开(公告)号：US20210200260A1
公开(公告)日：2021-07-01
申请号：US17131846
申请日：2020-12-23
发明人： Hideo HANEDA , Yasuhiro SUDO , Akio TSUTSUMI
摘要： A real-time clock device includes a resonator, a clock signal generation circuit, a time-counting circuit, a terminal, and a time-to-digital conversion circuit. The clock signal generation circuit outputs a time-counting clock signal based on an oscillation clock signal. The time-counting circuit generates time-counting data based on the time-counting clock signal. An external signal is input to the terminal. The time-to-digital conversion circuit measures a time difference between a transition timing of a first signal based on the external signal and a transition timing of a second signal based on the oscillation clock signal or the time-counting clock signal with a resolution higher than a time-counting resolution of the time-counting circuit, and obtains time difference information corresponding to the time difference.
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6.发明申请公开(公告)号：US20180091160A1
公开(公告)日：2018-03-29
申请号：US15712796
申请日：2017-09-22
发明人： Akio TSUTSUMI , Katsuhiko MAKI
CPC分类号： H03L7/0814 , G04F10/005 , H03H11/26 , H03K5/13 , H03K5/131 , H03L7/0816
摘要： A circuit device includes a first circuit, a second circuit, and a comparator array section. The first circuit has a first DLL circuit having a plurality of delay elements, and delays a first signal. The second circuit has a second DLL circuit having a plurality of delay elements, and delays a second signal. The comparator array section has a plurality of phase comparators arranged in a matrix, the first delayed signal group from the first circuit and the second delayed signal group from the second circuit are input to the comparator array section, and the comparator array section outputs a digital signal corresponding to a time difference in the transition timing between the first signal and the second signal.
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7.发明申请公开(公告)号：US20180091158A1
公开(公告)日：2018-03-29
申请号：US15715458
申请日：2017-09-26
CPC分类号： H03L7/087 , G04F10/005 , H03L7/18 , H03L7/23
摘要： A circuit device includes: a time-to-digital conversion circuit to which a first clock signal with a first clock frequency and a second clock signal with a second clock frequency different from the first clock frequency are input and that converts a time difference in transition timings of first and second signals into a digital value; and a synchronization circuit that synchronizes phases of the first and second clock signals. The time-to-digital conversion circuit calculates the digital value corresponding to the time difference by transitioning a signal level of the first signal based on the first clock signal after a phase synchronization timing of the first and second clock signals and compares the phase of the second clock signal to a phase of the second signal having a signal level is transitioned to correspond to the first signal.
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8.发明申请PHYSICAL QUANTITY DETECTION CIRCUIT, PHYSICAL QUANTITY DETECTION DEVICE, ELECTRONIC APPARATUS AND MOVING OBJECT 有权物理量检测电路，物理量检测装置，电子装置和移动对象公开(公告)号：US20140318244A1
公开(公告)日：2014-10-30
申请号：US14259590
申请日：2014-04-23
发明人： Akio TSUTSUMI
IPC分类号： G01C19/56
CPC分类号： G01C19/5776 , G01C19/5614
摘要： A detection circuit (physical quantity detection circuit) includes a digital arithmetic operation circuit (arithmetic operation processing portion) that performs an arithmetic operation process of generating an arithmetic operation signal according to a magnitude of a physical quantity, on the basis of a detection signal corresponding to the physical quantity. The digital arithmetic operation circuit performs an arithmetic operation process including a power supply voltage fluctuation correction process of correcting at least one of the detection signal and a signal which is obtained by a portion of the arithmetic operation process with respect to the detection signal, on the basis of a correction expression using a power supply voltage to be supplied as a variable.
摘要翻译： 检测电路（物理量检测电路）包括：数字算术运算电路（运算处理部），其根据物理量的大小进行算术运算处理，根据检测信号对应 到物理量。 数字算术运算电路执行算术运算处理，该运算处理包括电源电压波动校正处理，该电源电压波动校正处理将针对检测信号的运算处理的一部分获得的检测信号和信号中的至少一个进行校正， 使用要作为变量提供的电源电压的校正表达式的基础。
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公开(公告)号：US20230318608A1
公开(公告)日：2023-10-05
申请号：US18192111
申请日：2023-03-29
发明人： Jun UEHARA , Akio TSUTSUMI , Hideki SATO
摘要： A circuit device includes: a first phase comparison circuit including a sampling circuit that samples a feedback signal based on a reference clock signal; a first charge pump circuit configured to output a current corresponding to a sampling voltage; a second phase comparison circuit including a dead zone detection circuit that detects whether a phase difference between the reference clock signal and a feedback clock signal falls within a dead zone, and configured to output a phase difference signal when the phase difference does not fall within the dead zone; a second charge pump circuit; and a clock signal generation circuit configured to generate the clock signal having a frequency controlled based on an output of the first charge pump circuit or the second charge pump circuit. The second charge pump circuit is set disabled or in a low power consumption mode in a dead zone period.
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10.发明申请公开(公告)号：US20220004220A1
公开(公告)日：2022-01-06
申请号：US17126521
申请日：2020-12-18
发明人： Hisahiro ITO , Hideo HANEDA , Yasuhiro SUDO , Akio TSUTSUMI
摘要： A circuit device is used in an electronic device including a receiver, a control circuit that performs processing on reception data received by the receiver using a clock signal, a transmitter that transmits transmission data generated by performing processing based on the reception data by the control circuit. The circuit device includes a time-to-digital conversion circuit that measures a time difference between a transition timing of a start signal based on the reception data and a transition timing of a stop signal based on the transmission data or the clock signal, and an output interface that outputs, to the control circuit, a measurement result of the time difference of the time-to-digital conversion circuit.
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