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    Methods of Forming Nonvolatile Memory Devices and Memory Devices Formed Thereby
    1.
    发明申请
    Methods of Forming Nonvolatile Memory Devices and Memory Devices Formed Thereby 审中-公开
    形成非易失性存储器件和存储器件的方法

    公开(公告)号：US20080197402A1

    公开(公告)日：2008-08-21

    申请号：US12031896

    申请日：2008-02-15

    申请人： Seung-woo Paek ,  Dae-hyun Jang ,  Jin-hong Kim

    发明人： Seung-woo Paek ,  Dae-hyun Jang ,  Jin-hong Kim

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L29/42324 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/40114

    摘要： Methods of forming non-volatile memory devices include forming a device isolation layer and a gate pattern of a non-volatile memory cell transistor, on a semiconductor substrate. This gate pattern includes a floating gate electrode and a control gate line that extends on the floating gate electrode and on the device isolation layer. At least a first portion of a first sidewall of the gate pattern is then covered with a first mask that exposes upper corners of the control gate line. The device isolation layer is then selectively etched at a first rate to define an at least partial opening therein. During this etching step, the upper corners of the control gate line are also etched back at a second rate less than the first rate.

    摘要翻译： 形成非易失性存储器件的方法包括在半导体衬底上形成器件隔离层和非易失性存储单元晶体管的栅极图案。 该栅极图案包括在浮栅极和器件隔离层上延伸的浮栅电极和控制栅极线。 栅极图案的第一侧壁的至少第一部分然后被暴露控制栅极线的上角的第一掩模覆盖。 然后以第一速率选择性地蚀刻器件隔离层，以在其中限定至少部分开口。 在该蚀刻步骤期间，控制栅极线的上角也以比第一速率小的第二速率被回蚀。

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20130320486A1

    公开(公告)日：2013-12-05

    申请号：US13786853

    申请日：2013-03-06

    申请人： Jin-Hyuk YOO ,  Dae-hyun Jang ,  Yoo-Chul Kong ,  Kyoung-Sub Shin

    发明人： Jin-Hyuk YOO ,  Dae-hyun Jang ,  Yoo-Chul Kong ,  Kyoung-Sub Shin

    IPC分类号： H01L23/48

    CPC分类号： H01L27/1157 ,  H01L23/48 ,  H01L23/528 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11582 ,  H01L29/0649 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Provided is a semiconductor device. The semiconductor device includes a conductive pattern disposed on a semiconductor substrate. First and second conductive lines disposed on the conductive pattern and located at the same level as each other, are provided. An isolation pattern is disposed between the first and second conductive lines. A first vertical structure passing through the first conductive line and conductive pattern is provided. A second vertical structure passing through the second conductive line and conductive patterns is provided. An auxiliary pattern passing through the conductive pattern and in contact with the isolation pattern is provided.

    摘要翻译： 提供一种半导体器件。 半导体器件包括设置在半导体衬底上的导电图案。 设置在导电图案上并且彼此位于相同水平面的第一和第二导电线。 隔离图案设置在第一和第二导线之间。 提供穿过第一导线和导电图案的第一垂直结构。 提供穿过第二导线和导电图案的第二垂直结构。 提供穿过导电图案并与隔离图案接触的辅助图案。

    Image display apparatus capable of analog/digital tuning with digital television tuner and analog/digital tuning method thereof
    3.
    发明申请
    Image display apparatus capable of analog/digital tuning with digital television tuner and analog/digital tuning method thereof 审中-公开
    能够利用数字电视调谐器进行模拟/数字调谐的图像显示装置及其模拟/数字调谐方法

    公开(公告)号：US20060152637A1

    公开(公告)日：2006-07-13

    申请号：US11203993

    申请日：2005-08-16

    申请人： Dae-hyun Jang

    发明人： Dae-hyun Jang

    IPC分类号： H04N5/50

    CPC分类号： H04N5/50 ,  H04N5/4401 ,  H04N5/46 ,  H04N21/42638 ,  H04N21/4383

    摘要： An image display apparatus capable of analog/digital tuning by a DTV tuner and an analog/digital tuning method thereof are provided. The image display apparatus includes a digital television (DTV) tuner for tuning at least one of an analog signal and a digital signal, a bus switch for switching the DTV tuner to tune at least one of an analog signal and a digital signal, and a control unit for controlling an operation of the bus switch in accordance with at least one mode selected between an analog mode and a digital mode whereby the analog tuning is implemented with a single DTV tuner, so that not only a cost of the analog tuner is reduced but also the design efficiency is increased due to increased space utilization.

    摘要翻译： 提供能够通过DTV调谐器进行模拟/数字调谐的图像显示装置及其模拟/数字调谐方法。 该图像显示装置包括用于调谐模拟信号和数字信号中的至少一个的数字电视（DTV）调谐器，用于切换DTV调谐器以调谐模拟信号和数字信号中的至少一个的总线开关，以及 控制单元，用于根据在模拟模式和数字模式之间选择的至少一种模式来控制总线开关的操作，由此通过单个DTV调谐器实现模拟调谐，使得不仅模拟调谐器的成本降低 而且由于空间利用率的提高，设计效率也得到提高。

    Method of forming pad patterns using self-align double patterning method, pad pattern layout formed using the same, and method of forming contact holes using self-align double patterning method
    4.
    发明申请
    Method of forming pad patterns using self-align double patterning method, pad pattern layout formed using the same, and method of forming contact holes using self-align double patterning method 有权
    使用自对准双图案化方法形成焊盘图案的方法，使用其形成的焊盘图案布局以及使用自对准双重图案形成方法形成接触孔的方法

    公开(公告)号：US20080081461A1

    公开(公告)日：2008-04-03

    申请号：US11589798

    申请日：2006-10-31

    申请人： Ji-young Lee ,  Dae-hyun Jang

    发明人： Ji-young Lee ,  Dae-hyun Jang

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76838 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816 ,  H01L21/76895 ,  H01L27/0207 ,  H01L27/105 ,  H01L2924/0002 ,  Y10S438/947 ,  H01L2924/00

    摘要： A self-align patterning method for forming patterns includes forming a first layer on a substrate, forming a plurality of first hard mask patterns on the first layer, forming a sacrificial layer on top surfaces and sidewalls of the first hard mask patterns, thereby forming a gap between respective facing portions of the sacrificial layer on the sidewalls of the first hard mask patterns, forming a second hard mask pattern in the gap, etching the sacrificial layer using the second hard mask pattern as a mask to expose the first hard mask patterns, exposing the first layer using the exposed first hard mask patterns and the second hard mask pattern, and etching the exposed first layer using the first and second hard mask patterns.

    摘要翻译： 用于形成图案的自对准图案化方法包括在衬底上形成第一层，在第一层上形成多个第一硬掩模图案，在第一硬掩模图案的顶表面和侧壁上形成牺牲层，由此形成 在第一硬掩模图案的侧壁上的牺牲层的相对面对部分之间的间隙，在间隙中形成第二硬掩模图案，使用第二硬掩模图案作为掩模蚀刻牺牲层以暴露第一硬掩模图案， 使用暴露的第一硬掩模图案和第二硬掩模图案曝光第一层，并且使用第一和第二硬掩模图案蚀刻暴露的第一层。