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公开(公告)号:US20180138593A1
公开(公告)日:2018-05-17
申请号:US15553373
申请日:2016-10-25
Applicant: Sharp Kabushiki Kaisha
Inventor: Makoto NAKAZAWA , Takatoshi ORUI , Wataru NAKAMURA , Tadashi OHTAKE , Fumiki NAKANO , Kiyoshi MINOURA
CPC classification number: H01Q1/243 , G02F1/1313 , G02F1/13394 , G02F1/1362 , G02F1/136213 , G02F1/292 , G02F2202/42 , G02F2203/62 , H01L23/66 , H01L27/1218 , H01L27/124 , H01L27/1262 , H01L29/66765 , H01L29/66969 , H01L29/78669 , H01L29/78678 , H01L29/7869 , H01L2223/6677 , H01Q1/125 , H01Q1/364 , H01Q3/242 , H01Q3/34 , H01Q3/44 , H01Q3/46 , H01Q13/10 , H01Q13/22 , H01Q21/06
Abstract: A scanned antenna (1000) is a scanned antenna including antenna elements (U) arranged together, the scanned antenna including: a TFT substrate (101) including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51) a slot electrode (55); a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65). The slot electrode includes slots (57) arranged so as to correspond to the patch electrodes. As seen from the normal direction to the first dielectric substrate, a plurality of spacer structures (75) provided between the TFT substrate and the slot substrate are arranged so as not to overlap with first regions (Rp1) and/or second regions (Rp2), where the first regions are regions that are within a distance of 0.3 mm from edges of the slots and the second regions are regions that are within a distance of 0.3 mm from edges of the patch electrodes.
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公开(公告)号:US20210111218A1
公开(公告)日:2021-04-15
申请号:US16498499
申请日:2018-03-28
Applicant: Sharp Kabushiki Kaisha
Inventor: Yu NAKAMURA , Kazuhide TOMIYASU , Makoto NAKAZAWA , Hiroyuki MORIWAKI , Wataru NAKAMURA , Fumiki NAKANO
IPC: H01L27/146 , G01T1/20
Abstract: Provided are an X-ray imaging panel capable of suppressing a leak current of a photoelectric conversion layer while reducing the number of steps for manufacturing the imaging panel, and a method for manufacturing the same. An imaging panel 1 generates an image based on scintillation light obtained from X-rays passing through a subject. The imaging panel 1 is provided with a thin film transistor 13, passivation films 103 and 104 covering the thin film transistor 13, a photoelectric conversion layer 15 converting scintillation light into a charge, an upper electrode 16, and a lower electrode 14 connected to the thin film transistor 13, on a substrate 101. End portions of the lower electrode 14 are disposed on an inner side than the end portions of the photoelectric conversion layer 15. The lower electrode 14 and the thin film transistor 13 are connected to each other via a contact hole CH1 formed in the passivation films 103 and 104, in a region in which the photoelectric conversion layer 15 is provided.
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公开(公告)号:US20190035824A1
公开(公告)日:2019-01-31
申请号:US16072910
申请日:2017-01-16
Applicant: SHARP KABUSHIKI KAISHA
Inventor: Takao SAITOH , Yohsuke KANZAKI , Makoto NAKAZAWA , Kazuatsu ITO , Seiji KANEKO
IPC: H01L27/12 , G06F3/041 , H01L21/768 , H01L29/786
Abstract: A semiconductor device includes: a first thin film transistor (101) including a crystalline silicon semiconductor layer (13); and a second thin film transistor (102) including an oxide semiconductor layer (23). First source/drain electrodes (31), (33) of the first thin film transistor (101) are provided on the crystalline silicon semiconductor layer via a first interlevel dielectric layer (L1); a second source electrode (25S) of the second thin film transistor (102) is electrically connected to a line (35) which is made of the same conductive film as the first source/drain electrodes; the line (35) is provided on the second source electrode (25S) via a second interlevel dielectric layer (L2), and is in contact with the second source electrode (25S) within a second contact hole including an opening made in the second interlevel dielectric layer (L2); the second source electrode has a multilayer structure including a main layer (25m) and an upper layer (25u) disposed on the main layer such that, under the opening in the second interlevel dielectric layer, the upper layer (25u) has a first aperture and the main layer (25m) has a second aperture (p2) or recess, the second aperture (p2) or recess being larger than the first aperture (p1) as viewed from the normal direction of the substrate.
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公开(公告)号:US20190081075A1
公开(公告)日:2019-03-14
申请号:US16078249
申请日:2017-02-21
Applicant: Sharp Kabushiki Kaisha
Inventor: Kazuatsu ITO , Seiji KANEKO , Yohsuke KANZAKI , Takao SAITOH , Makoto NAKAZAWA
IPC: H01L27/12 , H01L29/786 , H01L29/417 , H01L29/423 , H01L29/51
Abstract: A method of producing a semiconductor device according to an embodiment of the present invention includes: step (C) of forming an oxide semiconductor layer of a plurality of thin film transistors on a gate dielectric layer; step (F) of forming an aperture in an interlevel dielectric layer, the aperture being located between an active region and a plurality of terminal portions and extending through the interlevel dielectric layer; and step (G) of, after step (F), forming an upper conductive portion on the interlevel dielectric layer. In step (C), a protection layer made of the same oxide semiconductor film as the oxide semiconductor layer is formed above a region of the gate dielectric layer that is located between the active region and the plurality of terminal portions. In step (F), the aperture is formed so as to overlap the protection layer.
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公开(公告)号:US20180138594A1
公开(公告)日:2018-05-17
申请号:US15553376
申请日:2016-10-14
Applicant: Sharp Kabushiki Kaisha
Inventor: Takatoshi ORUI , Shigeyasu MORI , Makoto NAKAZAWA , Fumiki NAKANO , Kiyoshi MINOURA
CPC classification number: H01Q3/44 , H01L23/66 , H01L27/1218 , H01L27/124 , H01L27/1262 , H01L29/66765 , H01L29/66969 , H01L29/78669 , H01L29/78678 , H01L29/7869 , H01L2223/6677 , H01Q3/34 , H01Q13/10 , H01Q21/0012 , H01Q21/064 , H01Q21/20 , H01Q21/24
Abstract: A scanned antenna (1000) is a scanned antenna including antenna elements (U) arranged together, the scanned antenna comprising: a TFT substrate including a first dielectric substrate (1), TFTs, gate bus lines, source bus lines, and patch electrodes (15); a slot substrate (201) including a second dielectric substrate (51), and a slot electrode (55) formed on a first primary surface of the second dielectric substrate; a liquid crystal layer (LC) provided between the TFT substrate and the slot substrate; and a reflective conductive plate (65) arranged so as to oppose a second primary surface of the second dielectric substrate (51) with a dielectric layer (54) interposed therebetween, the second primary surface being on an opposite side from the first primary surface. The TFT substrate (TFT substrate portion (101Cb)) includes a terminal region (TR) outside of the seal portion (73), and the gate bus lines or the source bus lines are connected to gate terminal portions or source terminal portions formed in the terminal region via a transparent conductive layer (14b) provided between the seal portion (73) and the TFT substrate.
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公开(公告)号:US20210028221A1
公开(公告)日:2021-01-28
申请号:US16934049
申请日:2020-07-21
Applicant: Sharp Kabushiki Kaisha
Inventor: Makoto NAKAZAWA , Rikiya TAKITA , Fumiki NAKANO
IPC: H01L27/146 , H04N5/32
Abstract: An imaging panel includes: a photoelectric converting element on a substrate; a first wiring layer that does not overlap the element in plan view and that is provided more adjacent to the substrate than an anode of the element; and a second wiring layer provided at an opposite side to the substrate with respect to the element. A first insulating layer that overlaps the element and the first wiring layer in plan view is provided between the wiring layers. First and second openings that penetrate the first insulating layer are provided, the wiring layers are connected in the first opening, and the anode and the second wiring layer are connected in the second opening. An electrically independent adjustment metal layer is arranged at a position that overlaps the first opening in plan view and that is more adjacent to the substrate than the first wiring layer.
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公开(公告)号:US20200035745A1
公开(公告)日:2020-01-30
申请号:US16493365
申请日:2018-03-15
Applicant: Sharp Kabushiki Kaisha
Inventor: Rikiya TAKITA , Wataru NAKAMURA , Fumiki NAKANO , Kazuhide TOMIYASU , Makoto NAKAZAWA , Hiroyuki MORIWAKI
IPC: H01L27/146 , G01T1/20 , H01L29/786 , A61B6/00
Abstract: An imaging device according to an embodiment of the present invention includes a photoelectric conversion part that converts incident light into electric charge, and a detection part that detects the electric charge generated in the photoelectric conversion part. The photoelectric conversion part includes a plurality of photodiodes arranged in a matrix, and the detection part includes a plurality of thin film transistors provided corresponding to the plurality of photodiodes and arranged in a matrix. Each of the photodiodes includes a lower electrode, a semiconductor layer, and an upper electrode, and an insulating layer is provided between at least a portion of the lower electrode in the thickness direction and the semiconductor layer in the peripheral portion of the semiconductor layer. An end of the insulating layer has a tapered shape having an acute angle between the lower surface and the side surface of the insulating layer.
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公开(公告)号:US20180337446A1
公开(公告)日:2018-11-22
申请号:US15542488
申请日:2016-10-06
Applicant: Sharp Kabushiki Kaisha
Inventor: Makoto NAKAZAWA , Takatoshi ORUI , Shigeyasu MORI , Fumiki NAKANO , Kiyoshi MINOURA
CPC classification number: H01Q1/38 , G09G3/3614 , G09G3/3648 , H01L23/345 , H01L23/66 , H01L27/1222 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L27/1259 , H01L29/786 , H01L29/78669 , H01L29/7869 , H01L2223/6677 , H01Q1/241 , H01Q3/34 , H01Q3/44 , H01Q21/0012 , H01Q21/0087 , H01Q21/064
Abstract: A TFT substrate (101) including a plurality of antenna element regions (U) arranged on a dielectric substrate (1), the TFT substrate including a transmitting/receiving region including a plurality of antenna element regions, and a non-transmitting/receiving region located outside of the transmitting/receiving region, each of the plurality of antenna element regions (U) including: a thin film transistor (10); a first insulating layer (11) covering the thin film transistor and having a first opening (CH1) which exposes a drain electrode (7D) of the thin film transistor (10); and a patch electrode (15) formed on the first insulating layer (11) and in the first opening (CH1), and electrically connected to the drain electrode (7D) of the thin film transistor, wherein the patch electrode (15) includes a metal layer, and a thickness of the metal layer is greater than a thickness of a source electrode (7S) and the drain electrode (7D) of the thin film transistor.
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