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公开(公告)号：US10367016B2
公开(公告)日：2019-07-30
申请号：US15570754
申请日：2017-05-03
发明人： Zhichao Zhou
IPC分类号： H01L21/02 , H01L27/12 , H01L21/443 , H01L21/027 , H01L21/4757 , H01L23/00 , H01L29/786 , H01L29/66 , H01L29/24
摘要： A method for manufacturing a TFT (Thin-Film Transistor) substrate is proposed. The method includes utilizing a first photomask process to form a buffer layer, a data line, a source electrode, a first scan line, a second scan line, and a gate electrode on a substrate; utilizing a second photomask process to form a first insulation layer, a second insulation layer, a first semiconductor layer, and a second semiconductor layer on the substrate; and utilizing a third photomask process to form a first conductor layer, an electrical connection portion, and a drain electrode on the substrate.
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公开(公告)号：US10224406B2
公开(公告)日：2019-03-05
申请号：US15325985
申请日：2016-10-12
发明人： Zhichao Zhou , Yulien Chou , Yue Wu
IPC分类号： H01L21/77 , H01L27/12 , H01L29/417 , G02F1/1368
摘要： A TFT array substrate includes a glass substrate, a buffer layer on the glass substrate, a source electrode, a passivation layer on the buffer layer, a gate electrode on the passivation layer, a gate insulating layer on the passivation layer and the gate electrode, an active layer, and a pixel electrode on the gate insulating layer and the active layer. A first source hole is formed in the buffer layer. The source electrode is disposed in the first source hole. A second source hole is formed in the passivation layer and over the first source hole. The source electrode extends into the second source hole. An active layer mounting hole is formed in the gate insulating layer and over the second source hole. The active layer is in the active layer mounting hole.
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公开(公告)号：US10120246B2
公开(公告)日：2018-11-06
申请号：US15328495
申请日：2016-12-15
发明人： Zhichao Zhou , Hui Xia
IPC分类号： H01L21/00 , G02F1/1343 , H01L21/77 , H01L27/12 , G02F1/1333 , G02F1/1335 , G02F1/1362 , G02F1/1368
摘要： The present invention provides a manufacturing method of an IPS array substrate and an IPS array substrate. The manufacturing method of the IPS array substrate according to the present invention uses a half-tone mask to simultaneously form a common electrode and a pixel electrode that stagger in a longitudinal direction so that the common electrode is set inside a common electrode channel of an insulation protection layer while the pixel electrode is set on an upper surface of the insulation protection layer to provide an IPS array substrate, which, compared to a traditional IPS array substrate, allows the common electrode and the pixel electrode to generate therebetween a longitudinal component of an electric field whereby liquid crystal of a liquid crystal panel that is located above the pixel electrode can be driven and used, where the liquid crystal is allowed to rotate horizontally and also allowed to generate a predetermined longitudinal tilt angle the TFT substrate can be a TFT substrate provided for a traditional IPS array substrate, making it possible to save one mask and associated process, as compared to a traditional FFS array substrate, and thus saving manufacturing cost.
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公开(公告)号：US10246783B2
公开(公告)日：2019-04-02
申请号：US15123645
申请日：2016-07-11
发明人： Yue Wu , Yu-lien Chou , Zhichao Zhou
IPC分类号： C23F1/18
摘要： The present disclosure discloses a copper etchant solution additives and a method for producing copper etchant solution. The method includes: producing copper etchant solution additives, wherein the copper etchant solution additives is an inorganic solution with cupric ions (Cu2+), and deionized water is a solvent for the copper etchant solution additives and is electric neutrality; before wet-etching, the copper etchant solution additives is added in the copper etchant solution, and the copper etchant solution is with a cupric ions (Cu2+) concentration of 700-1000 ppm. Through the above method, the present disclosure can improve etchant property of copper etchant solution to increase etching rate and uniformity.
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公开(公告)号：US11114567B2
公开(公告)日：2021-09-07
申请号：US16278718
申请日：2019-02-19
发明人： Zhichao Zhou , Hui Xia
IPC分类号： H01L29/786 , H01L29/66 , H01L21/02 , H01L21/027 , H01L21/28 , H01L21/285 , H01L21/306 , H01L21/308 , H01L21/311 , H01L21/3213 , H01L21/443 , H01L21/467 , H01L21/4757 , H01L21/4763 , H01L23/31 , H01L27/12 , H01L29/49
摘要： A manufacturing method of TFT substrate and a TFT substrate are provided. The method provides a dual-gate structure symmetrically disposed on both sides of active layer, which prevents TFT threshold voltage from changing and improve TFT conduction state switching; by first manufacturing the active layer before the gate insulating layer to make the insulating layer directly grow on active layer, the contact interface between the gate insulating layer and active layer is improved, leading to further improving TFT conduction state switching. The TFT substrate makes the gate located between the source and the pixel electrode in vertical direction, and the dual-gate is symmetrically disposed on both sides of active layer to prevent TFT threshold voltage from changing and improve TFT conduction state switching, as well as improve the contact interface between the gate insulating layer and active layer, leading to further improving TFT conduction state switching.
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公开(公告)号：US20190181272A1
公开(公告)日：2019-06-13
申请号：US16278718
申请日：2019-02-19
发明人： Zhichao Zhou , Hui Xia
IPC分类号： H01L29/786 , H01L29/66 , H01L21/28 , H01L21/285 , H01L21/443 , H01L23/31 , H01L27/12 , H01L21/02 , H01L21/027 , H01L21/306 , H01L21/308 , H01L21/311 , H01L21/3213 , H01L21/467 , H01L21/4757 , H01L21/4763 , H01L29/49
摘要： A manufacturing method of TFT substrate and a TFT substrate are provided. The method provides a dual-gate structure symmetrically disposed on both sides of active layer, which prevents TFT threshold voltage from changing and improve TFT conduction state switching; by first manufacturing the active layer before the gate insulating layer to make the insulating layer directly grow on active layer, the contact interface between the gate insulating layer and active layer is improved, leading to further improving TFT conduction state switching. The TFT substrate makes the gate located between the source and the pixel electrode in vertical direction, and the dual-gate is symmetrically disposed on both sides of active layer to prevent TFT threshold voltage from changing and improve TFT conduction state switching, as well as improve the contact interface between the gate insulating layer and active layer, leading to further improving TFT conduction state switching.
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公开(公告)号：US10193089B2
公开(公告)日：2019-01-29
申请号：US15123641
申请日：2016-07-06
发明人： Zhichao Zhou , Hui Xia
IPC分类号： H01L27/12 , H01L51/05 , H01L27/32 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/786
摘要： A display device, an array substrate, and a manufacturing method for the array substrate are disclosed. The array substrate includes a substrate base, and two gates, a source, a drain, an active layer, and a pixel electrode on the substrate base. The drain and the pixel electrode are connected together. The source and the drain contact the active layer, respectively. The two gates control the conduction and cut off of the active layer, which in turn controls the conduction and cut off between the source and the drain. Through the present disclosure, the variation of threshold voltage is effectively prevented.
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公开(公告)号：US20180217454A1
公开(公告)日：2018-08-02
申请号：US15328495
申请日：2016-12-15
发明人： Zhichao Zhou , Hui Xia
IPC分类号： G02F1/1343 , G02F1/1333 , G02F1/1362 , G02F1/1335 , G02F1/1368 , H01L27/12
CPC分类号： G02F1/134363 , G02F1/133345 , G02F1/133512 , G02F1/133514 , G02F1/1343 , G02F1/136286 , G02F1/1368 , G02F2201/121 , G02F2201/123 , H01L21/77 , H01L27/12 , H01L27/124 , H01L27/1288
摘要： The present invention provides a manufacturing method of an IPS array substrate and an IPS array substrate. The manufacturing method of the IPS array substrate according to the present invention uses a half-tone mask to simultaneously form a common electrode and a pixel electrode that stagger in a longitudinal direction so that the common electrode is set inside a common electrode channel of an insulation protection layer while the pixel electrode is set on an upper surface of the insulation protection layer to provide an IPS array substrate, which, compared to a traditional IPS array substrate, allows the common electrode and the pixel electrode to generate therebetween a longitudinal component of an electric field whereby liquid crystal of a liquid crystal panel that is located above the pixel electrode can be driven and used, where the liquid crystal is allowed to rotate horizontally and also allowed to generate a predetermined longitudinal tilt angle the TFT substrate can be a TFT substrate provided for a traditional IPS array substrate, making it possible to save one mask and associated process, as compared to a traditional FFS array substrate, and thus saving manufacturing cost.
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公开(公告)号：US09899221B2
公开(公告)日：2018-02-20
申请号：US15113432
申请日：2016-06-29
发明人： Zhichao Zhou , Hui Xia
CPC分类号： H01L21/0425 , G02F1/13439 , H01L21/28123 , H01L21/82 , H01L29/786
摘要： The present disclosure discloses a method for preparing electrode including: providing a substrate; forming a buffer layer on the substrate; forming a patterned photoresist on the surface of the buffer layer away from the substrate, the photoresist has a bottom surface and a top surface disposed opposite and a side connected between the bottom surface and the top surface, the bottom surface is bonded to the buffer layer; by dry etching, the portions of the photoresist not covered by the buffer layer is removed to form a receiving area; depositing a conductive film, the conductive film layer includes a waste material forming on the top surface and an electrode filling in the receiving area; and stripping the waste material and the photoresist. The yields of the method for preparing electrode of the present disclosure is high.
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公开(公告)号：US09646999B1
公开(公告)日：2017-05-09
申请号：US14908087
申请日：2015-12-18
发明人： Zhichao Zhou , Yue Wu
IPC分类号： H01L27/14 , H01L27/12 , H01L29/49 , H01L29/45 , H01L29/417 , H01L29/423 , H01L21/443 , H01L29/786 , H01L29/66
CPC分类号： H01L27/1225 , H01L21/443 , H01L27/1259 , H01L29/41733 , H01L29/42372 , H01L29/45 , H01L29/4908 , H01L29/66969 , H01L29/7869
摘要： The present disclosure proposes a TFT. The source and the drain of the TFT are disposed on the same side as the gate. The gate includes a first buffer layer, a first copper layer, a second copper layer and a second buffer layer that are stacked from bottom to top, and the second buffer layer is disposed on the side that is close to the source and drain. The source and drain include a first buffer layer, a first copper layer, a second copper layer and a second buffer layer that are stacked, and the first buffer layer is disposed on the side that is close to the gate. The first copper layer is deposited by a first power, the second copper layer is deposited by a second power lower than the first power. Through the above method, it is prevents photoresist from shedding when etching.
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