Drive circuit for character and graphic display device
    2.
    发明授权
    Drive circuit for character and graphic display device 失效
    字符和图形显示装置的驱动电路

    公开(公告)号:US4388621A

    公开(公告)日:1983-06-14

    申请号:US158263

    申请日:1980-06-10

    CPC分类号: G09G5/001

    摘要: In a .phi..sub.2 cycle steal mode, a clock signal is selected such that a time period during which a RAM is connected to a timing signal generator for display is extended and a time period during which the RAM is connected to a CPU is shortened accordingly, without changing an overall period. This clock signal is used to actuate a switching circuit for the RAM while a clock signal having unmodified duty ratio is applied to the CPU, a ROM and external circuits so that a display data readout period from the RAM is extended without affecting the CPU clock frequency and the operation of other circuits. During this readout period, a plurality of display address signals are applied to the RAM from the timing signal generator and a plurality of data derived from the RAM are sequentially loaded in a register which is then read out at a desired timing to enable the display of a plurality of characters in one CPU clock period.

    摘要翻译: 在phi 2循环盗取模式中,选择时钟信号,使得连接到用于显示的定时信号发生器的RAM的时间段被延长,并且相应地缩短RAM连接到CPU的时间段, 而不改变整个时期。 该时钟信号用于激活用于RAM的开关电路,而具有未修改占空比的时钟信号被施加到CPU,ROM和外部电路,使得来自RAM的显示数据读出周期不会影响CPU时钟频率 和其他电路的操作。 在该读出期间,多个显示地址信号从定时信号发生器施加到RAM,并且从RAM导出的多个数据顺序地加载到寄存器中,然后在期望的定时读出寄存器,以使得能够显示 一个CPU时钟周期内的多个字符。

    Arrangement for control of the operation of a random access memory in a
data processing system
    3.
    发明授权
    Arrangement for control of the operation of a random access memory in a data processing system 失效
    用于控制数据处理系统中的随机存取存储器的操作的布置

    公开(公告)号:US4417318A

    公开(公告)日:1983-11-22

    申请号:US35237

    申请日:1979-05-02

    CPC分类号: G09G5/001

    摘要: A data processing system has a dynamic type memory, a static type memory for storing data periodically read out, a central processing unit for transferring data to and from the two memories, an address generating circuit for periodically applying an address to the static type memory to read out the contents thereof, and an address selecting unit for exclusively selecting an address from the central processing unit or an address from the address generating circuit. In the system, the two memories are connected to the address selecting unit in order that the address selected by the address selecting means is supplied common to both the memories.

    摘要翻译: 数据处理系统具有动态型存储器,用于存储周期性读出的数据的静态存储器,用于向两个存储器传送数据的中央处理单元,用于周期性地向静态存储器施加地址的地址生成电路 读取其内容,以及地址选择单元,用于从中央处理单元专门选择地址或地址生成电路的地址。 在该系统中,两个存储器连接到地址选择单元,以便将由地址选择装置选择的地址提供给两个存储器。

    Pattern display apparatus
    4.
    发明授权
    Pattern display apparatus 失效
    图案显示装置

    公开(公告)号:US4408197A

    公开(公告)日:1983-10-04

    申请号:US259162

    申请日:1981-04-30

    CPC分类号: G09G5/227

    摘要: A display apparatus for use with a cathode-ray tube capable of displaying patterns in interlaced scanning and non-interlaced scanning operation modes, comprising a composite video signal synthesizer, a memory for storing pattern data, a mode setting circuit for the memory, a data selection signal generator and a raster line number signal generator. The memory stores data for relatively simple patterns such as alphabetical letters and those for relatively complicated patterns such as Chinese characters in individually particular areas in the memory addresses of these different areas are identified by a combination of the data selection signal and the raster line number signal supplied to the memory from the data selection signal generator and the raster line number signal generator. Accordingly, the apparatus is capable of displaying both relatively simple and relatively complicated patterns with satisfactory resolution and with a relatively small-scale structure.

    摘要翻译: 一种用于能够以隔行扫描和非隔行扫描操作模式显示图案的阴极射线管的显示装置,包括复合视频信号合成器,用于存储图案数据的存储器,用于存储器的模式设置电路,数据 选择信号发生器和光栅线数信号发生器。 存储器存储用于诸如字母字母的相对简单模式的数据,以及用于相对复杂图案的数据,例如在这些不同区域的存储器地址中的单独特定区域中的汉字,数据选择信号和光栅行号信号 从数据选择信号发生器和光栅线数信号发生器提供给存储器。 因此,该装置能够以令人满意的分辨率和相对较小规模的结构显示相对简单且相对复杂的图案。

    Memory selecting system
    5.
    发明授权
    Memory selecting system 失效
    内存选择系统

    公开(公告)号:US4388707A

    公开(公告)日:1983-06-14

    申请号:US279071

    申请日:1981-06-30

    CPC分类号: G11C8/12 G06F12/0623

    摘要: A memory selection system which facilitates the addition of an external memory to a digital processing unit having an internal memory is disclosed. When a plurality of memories have the same addresses and an overlapped address is accessed, priority among the memories having the overlapped address is discriminated to enable only the memory having the highest priority (last attached memory) to be selected for access and to disable the access of the other memories.

    摘要翻译: 公开了一种便于将外部存储器添加到具有内部存储器的数字处理单元的存储器选择系统。 当多个存储器具有相同的地址并且重叠地址被访问时,区分具有重叠地址的存储器中的优先级,以使得仅能够选择具有最高优先级的存储器(最后附加存储器)以进行访问并禁用访问 的其他记忆。

    Digital data processing device
    6.
    发明授权
    Digital data processing device 失效
    数字数据处理装置

    公开(公告)号:US4368461A

    公开(公告)日:1983-01-11

    申请号:US212232

    申请日:1980-12-02

    CPC分类号: G09G5/001 G09G5/02

    摘要: A digital data processing device in which a color memory has a temporal data storage register at input/output interface thereof so that the data write-in or data read-out operations executed by a micro-processing unit (MPU) is always performed through the temporal storage register. When data read-out or write-in operation is made to a character memory at a certain address, the same operation is simultaneously carried out for the color memory at the corresponding address. Assuming that MPU reads out a certain display address of a display screen, a corresponding character code is fetched by MPU from the character memory, while the corresponding color code is transferred to the temporal storage register from the color memory. When MPU performs the write-in operation for another address of the display screen, the character code held by MPU until then is written in the character memory at a designated address, while the color data i.e. the contents currently held by the temporal storage register are written in the color memory at the address which corresponds to the designated address of the character memory. In this manner, the color data is simultaneously transferred through the software-based processing for transferring only the character code in appearance, whereby the transfer of the contents to be displayed on the display screen can be carried out with an enhanced efficiency.

    摘要翻译: 一种数字数据处理装置,其中色彩存储器在其输入/输出接口处具有时间数据存储寄存器,使得由微处理单元(MPU)执行的数据写入或数据读出操作总是通过 临时存储寄存器。 当对特定地址的字符存储器进行数据读出或写入操作时,对于相应地址的彩色存储器同时进行相同的操作。 假设MPU读出显示屏幕的某个显示地址,则由MPU从字符存储器取出相应的字符代码,同时将相应的颜色代码从颜色存储器传送到临时存储寄存器。 当MPU对显示画面的另一个地址执行写入操作时,由MPU保持的字符代码以指定地址写入字符存储器,而颜色数据即时间存储寄存器当前保持的内容是 在对应于字符存储器的指定地址的地址处写入彩色存储器。 以这种方式,通过基于软件的处理来同时传送彩色数据,用于仅传送字符代码的外观,从而能够以提高的效率进行显示在显示画面上的内容的传送。

    Character and graphic signal generating apparatus
    7.
    发明授权
    Character and graphic signal generating apparatus 失效
    字符和图形信号发生装置

    公开(公告)号:US4591845A

    公开(公告)日:1986-05-27

    申请号:US534684

    申请日:1983-09-22

    IPC分类号: G06F3/153 G09G5/40 G09G1/16

    CPC分类号: G09G5/40

    摘要: A character and graphic signal generating apparatus of the type suitable for use with a personal computer for displaying characters and graphic patterns in a superposed relation according to a raster scan method comprises a frame buffer for storing coded character data, a DMA control unit for controlling DMA transfer of coded character data from a display RAM to the frame buffer in a non-display cycle, and units for reading out the data from the display RAM and the frame buffer in parallel relation in a display cycle so as to simultaneously derive the graphic data and the coded character data in each display cycle, whereby more display data can be read out in a unit time, and high-density display can be achieved without the sacrifice of the scanning speed.

    摘要翻译: 根据光栅扫描方法,适用于以个人计算机用于显示字符和叠加关系的图形的字符和图形信号发生装置包括用于存储编码字符数据的帧缓冲器,用于控制DMA的DMA控制单元 在非显示周期中将编码字符数据从显示RAM传送到帧缓冲器,以及用于在显示周期中并行地从显示RAM和帧缓冲器读出数据的单元,以便同时导出图形数据 和每个显示周期中的编码字符数据,从而可以在单位时间内读出更多的显示数据,并且可以在不牺牲扫描速度的情况下实现高密度显示。

    Image synthesizing apparatus for superposing a second image on a first
image
    10.
    发明授权
    Image synthesizing apparatus for superposing a second image on a first image 失效
    用于将第二图像叠加在第一图像上的图像合成装置

    公开(公告)号:US5179642A

    公开(公告)日:1993-01-12

    申请号:US856827

    申请日:1992-03-25

    申请人: Shigeru Komatsu

    发明人: Shigeru Komatsu

    IPC分类号: G06T15/40

    CPC分类号: G06T15/40

    摘要: An image synthesizing apparatus for synthesizing first and second images with each other which includes a first display memory for storing a first image data constituting a first image, and a display memory control device for comparing a second image data for constituting a second image with a predetermined image data to thereby judge whether the second image data is to be written into the first display memory or not.

    摘要翻译: 一种用于合成第一和第二图像的图像合成装置,包括:第一显示存储器,用于存储构成第一图像的第一图像数据;以及显示存储器控制装置,用于将用于构成第二图像的第二图像数据与预定的 从而判断第二图像数据是否被写入第一显示存储器。