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公开(公告)号:US20120205609A1
公开(公告)日:2012-08-16
申请号:US13235842
申请日:2011-09-19
申请人: Shigeto OSHINO , Kenji Aoyama , Kazuhiko Yamamoto , Shinichi Nakao , Kei Watanabe , Satoshi Ishikawa
发明人: Shigeto OSHINO , Kenji Aoyama , Kazuhiko Yamamoto , Shinichi Nakao , Kei Watanabe , Satoshi Ishikawa
IPC分类号: H01L45/00 , H01L21/8239 , B82Y99/00
CPC分类号: H01L27/101 , B82Y10/00 , B82Y30/00 , H01L27/2481 , H01L45/149 , H01L45/1608
摘要: According to one embodiment, a memory device includes a lower electrode layer, a nanomaterial assembly layer, a protective layer and an upper electrode layer. The nanomaterial assembly layer is provided on the lower electrode layer and includes a plurality of fine conductors assembled via a gap. The protective layer is provided on the nanomaterial assembly layer, is conductive, is in contact with the fine conductors, and includes an opening. The upper electrode layer is provided on the protective layer and is in contact with the protective layer.
摘要翻译: 根据一个实施例,存储器件包括下电极层,纳米材料组合层,保护层和上电极层。 纳米材料组装层设置在下电极层上,并且包括通过间隙组装的多个细导体。 保护层设置在纳米材料组装层上,导电,与细导体接触,并包括开口。 上电极层设置在保护层上并与保护层接触。
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公开(公告)号:US20120217464A1
公开(公告)日:2012-08-30
申请号:US13404678
申请日:2012-02-24
申请人: Shigeki Kobayashi , Kazuhiko Yamamoto , Kenji Aoyama , Shigeto Oshino , Kei Watanabe , Shinichi Nakao , Satoshi Ishikawa , Takeshi Yamaguchi
发明人: Shigeki Kobayashi , Kazuhiko Yamamoto , Kenji Aoyama , Shigeto Oshino , Kei Watanabe , Shinichi Nakao , Satoshi Ishikawa , Takeshi Yamaguchi
IPC分类号: H01L45/00
CPC分类号: H01L27/2481 , H01L27/2409 , H01L45/04 , H01L45/12 , H01L45/1233 , H01L45/149
摘要: A nonvolatile storage device is formed by laminating a plurality of memory cell arrays, the memory cell array including a plurality of word lines, a plurality of bit lines, and memory cells. The memory cell includes a current rectifying device and a variable resistance device, the variable resistance device includes a lower electrode, an upper electrode, and a resistance change layer including a conductive nano material formed between the lower electrode and the upper electrode, one of the variable resistance devices provided adjacent to each other in the laminating direction has titanium oxide (TiOx) between the resistance change layer and the lower electrode serving as a cathode, the other of the variable resistance devices provided adjacent to each other in the laminating direction has titanium oxide (TiOx) between the resistance change layer and the upper electrode serving as a cathode.
摘要翻译: 通过层叠多个存储单元阵列形成非易失性存储装置,所述存储单元阵列包括多个字线,多个位线和存储单元。 存储单元包括电流整流装置和可变电阻装置,可变电阻装置包括下电极,上电极和包括形成在下电极和上电极之间的导电纳米材料的电阻变化层, 在层叠方向上彼此相邻设置的可变电阻装置在电阻变化层和作为阴极的下部电极之间具有钛氧化物(TiOx),另外在层叠方向上彼此相邻设置的可变电阻装置具有钛 电阻变化层和作为阴极的上部电极之间的氧化物(TiOx)。
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公开(公告)号:US08895952B2
公开(公告)日:2014-11-25
申请号:US13404678
申请日:2012-02-24
申请人: Shigeki Kobayashi , Kazuhiko Yamamoto , Kenji Aoyama , Shigeto Oshino , Kei Watanabe , Shinichi Nakao , Satoshi Ishikawa , Takeshi Yamaguchi
发明人: Shigeki Kobayashi , Kazuhiko Yamamoto , Kenji Aoyama , Shigeto Oshino , Kei Watanabe , Shinichi Nakao , Satoshi Ishikawa , Takeshi Yamaguchi
CPC分类号: H01L27/2481 , H01L27/2409 , H01L45/04 , H01L45/12 , H01L45/1233 , H01L45/149
摘要: A nonvolatile storage device is formed by laminating a plurality of memory cell arrays, the memory cell array including a plurality of word lines, a plurality of bit lines, and memory cells. The memory cell includes a current rectifying device and a variable resistance device, the variable resistance device includes a lower electrode, an upper electrode, and a resistance change layer including a conductive nano material formed between the lower electrode and the upper electrode, one of the variable resistance devices provided adjacent to each other in the laminating direction has titanium oxide (TiOx) between the resistance change layer and the lower electrode serving as a cathode, the other of the variable resistance devices provided adjacent to each other in the laminating direction has titanium oxide (TiOx) between the resistance change layer and the upper electrode serving as a cathode.
摘要翻译: 通过层叠多个存储单元阵列形成非易失性存储装置,所述存储单元阵列包括多个字线,多个位线和存储单元。 存储单元包括电流整流装置和可变电阻装置,可变电阻装置包括下电极,上电极和包括形成在下电极和上电极之间的导电纳米材料的电阻变化层, 在层叠方向上彼此相邻设置的可变电阻装置在电阻变化层和作为阴极的下部电极之间具有钛氧化物(TiOx),另外在层叠方向上彼此相邻设置的可变电阻装置具有钛 电阻变化层和作为阴极的上部电极之间的氧化物(TiOx)。
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公开(公告)号:US08507888B2
公开(公告)日:2013-08-13
申请号:US13018765
申请日:2011-02-01
IPC分类号: H01L45/00
CPC分类号: H01L45/16 , B82Y10/00 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/1246 , H01L45/149 , H01L45/1608 , H01L45/1675
摘要: According to one embodiment, a nonvolatile memory device includes a selection element layer and a nanomaterial aggregate layer. The selection element layer includes silicon. The nanomaterial aggregate layer is stacked on the selection element layer. The nanomaterial aggregate layer includes a plurality of micro conductive bodies and fine particles dispersed in a plurality of gaps between the micro conductive bodies. At least a surface of the fine particle is made of an insulating material other than silicon oxide.
摘要翻译: 根据一个实施例,非易失性存储器件包括选择元件层和纳米材料聚集层。 选择元件层包括硅。 纳米材料聚集层层叠在选择元件层上。 纳米材料聚集体层包括分散在微导电体之间的多个间隙中的多个微导电体和微粒。 至少微细颗粒的表面由氧化硅以外的绝缘材料制成。
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公开(公告)号:US08866119B2
公开(公告)日:2014-10-21
申请号:US13051264
申请日:2011-03-18
申请人: Kazuhiko Yamamoto , Kenji Aoyama
发明人: Kazuhiko Yamamoto , Kenji Aoyama
CPC分类号: H01L45/04 , G11C13/0014 , G11C13/025 , G11C2213/16 , G11C2213/71 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L45/1233 , H01L45/145 , H01L45/149 , H01L45/1675
摘要: According to one embodiment, a memory device includes a selection element layer, a nanomaterial aggregate layer, and a fine particle. The nanomaterial aggregate layer is stacked on the selection element layer. The nanomaterial aggregate layer has a plurality of micro conductive bodies aggregated with an interposed gap. The fine particle has at least a surface made of silicon oxynitride. The fine particle is dispersed between the micro conductive bodies in one portion of the nanomaterial aggregate layer piercing the nanomaterial aggregate layer in a thickness direction.
摘要翻译: 根据一个实施例,存储器件包括选择元件层,纳米材料聚集体层和细颗粒。 纳米材料聚集层层叠在选择元件层上。 纳米材料聚集体层具有多个与插入的间隙聚集的微导电体。 细颗粒至少具有由氮氧化硅制成的表面。 微细颗粒分散在纳米材料聚集体层的一部分中的微导电体之间,该纳米材料聚集体层在厚度方向上穿透纳米材料聚集体层。
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公开(公告)号:US08416603B2
公开(公告)日:2013-04-09
申请号:US12973064
申请日:2010-12-20
申请人: Kenji Aoyama , Kazuhiko Yamamoto
发明人: Kenji Aoyama , Kazuhiko Yamamoto
CPC分类号: B82Y30/00 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1226 , H01L45/149
摘要: According to one embodiment, a nonvolatile memory device includes a first conductive member and a second conductive member. The first conductive member extends in a first direction. The second conductive member extends in a second direction intersecting the first direction. A portion of the first conductive member connected to the second conductive member protrudes toward the second conductive member. A resistivity of the first conductive member in the first direction is lower than a resistivity of the first conductive member in a third direction of the protrusion of the first conductive member. A resistance value of the first conductive member in the third direction changes. A resistivity of the second conductive member in the second direction is lower than a resistivity of the second conductive member in the third direction. A resistance value of the second conductive member in the third direction changes.
摘要翻译: 根据一个实施例,非易失性存储器件包括第一导电构件和第二导电构件。 第一导电构件沿第一方向延伸。 第二导电构件沿与第一方向相交的第二方向延伸。 连接到第二导电构件的第一导电构件的一部分朝向第二导电构件突出。 第一导电构件在第一方向上的电阻率低于第一导电构件在第一导电构件的突起的第三方向上的电阻率。 第一导电构件在第三方向上的电阻值改变。 第二导电构件在第二方向上的电阻率低于第二导电构件在第三方向上的电阻率。 第二导电构件在第三方向上的电阻值改变。
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公开(公告)号:US20120097914A1
公开(公告)日:2012-04-26
申请号:US13051264
申请日:2011-03-18
申请人: Kazuhiko YAMAMOTO , Kenji Aoyama
发明人: Kazuhiko YAMAMOTO , Kenji Aoyama
IPC分类号: H01L45/00
CPC分类号: H01L45/04 , G11C13/0014 , G11C13/025 , G11C2213/16 , G11C2213/71 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L27/2481 , H01L45/1233 , H01L45/145 , H01L45/149 , H01L45/1675
摘要: According to one embodiment, a memory device includes a selection element layer, a nanomaterial aggregate layer, and a fine particle. The nanomaterial aggregate layer is stacked on the selection element layer. The nanomaterial aggregate layer has a plurality of micro conductive bodies aggregated with an interposed gap. The fine particle has at least a surface made of silicon oxynitride. The fine particle is dispersed between the micro conductive bodies in one portion of the nanomaterial aggregate layer piercing the nanomaterial aggregate layer in a thickness direction.
摘要翻译: 根据一个实施例,存储器件包括选择元件层,纳米材料聚集体层和细颗粒。 纳米材料聚集层层叠在选择元件层上。 纳米材料聚集体层具有多个与插入的间隙聚集的微导电体。 细颗粒至少具有由氮氧化硅制成的表面。 微细颗粒分散在纳米材料聚集体层的一部分中的微导电体之间,该纳米材料聚集体层在厚度方向上穿透纳米材料聚集体层。
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公开(公告)号:US20120012805A1
公开(公告)日:2012-01-19
申请号:US12956548
申请日:2010-11-30
申请人: Kazuhiko YAMAMOTO , Kenji Aoyama
发明人: Kazuhiko YAMAMOTO , Kenji Aoyama
CPC分类号: H01L45/149 , H01L27/2409 , H01L45/1683
摘要: According to one embodiment, a nonvolatile memory device includes a first interconnect, a nanomaterial aggregate layer, and a second interconnect. The nanomaterial aggregate layer is provided on the first interconnect. The nanomaterial aggregate layer includes an aggregation of a plurality of micro conductive bodies. The second interconnect is provided on the nanomaterial aggregate layer. At least a lower portion of the nanomaterial aggregate layer is disposed inside the second interconnect as viewed from above.
摘要翻译: 根据一个实施例,非易失性存储器件包括第一互连,纳米材料聚集层和第二互连。 纳米材料聚集层设置在第一互连上。 纳米材料聚集层包括多个微导电体的聚集体。 第二互连设置在纳米材料聚集层上。 纳米材料聚集体层的至少下部设置在第二互连件的内部,如上所述。
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公开(公告)号:US08198670B2
公开(公告)日:2012-06-12
申请号:US12713652
申请日:2010-02-26
申请人: Kenji Aoyama
发明人: Kenji Aoyama
IPC分类号: H01L29/792
CPC分类号: H01L27/11578 , H01L27/11565 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要: A nonvolatile semiconductor memory device includes: a multilayer body with a plurality of insulating films and electrode films alternately stacked therein; a plurality of select gate electrodes provided on the multilayer body, extending in one direction orthogonal to a stacking direction of the multilayer body, and spaced from each other; semiconductor pillars penetrating through the multilayer body and the select gate electrodes; and a charge storage film provided between one of the electrode films and one of the semiconductor pillars, two neighboring ones of the semiconductor pillars penetrating through a common one of the select gate electrodes and penetrating through mutually different positions in a width direction of the select gate electrodes.
摘要翻译: 非易失性半导体存储器件包括:具有多个绝缘膜和交替层叠的电极膜的多层体; 设置在所述多层体上的多个选择栅极,在与所述多层体的堆叠方向正交的一个方向上延伸并且彼此间隔开; 穿过多层体和选择栅电极的半导体柱; 以及电荷存储膜,其设置在所述电极膜之一和所述半导体柱之一之间,所述半导体柱中的两个相邻的所述半导体柱穿透所述选择栅电极中的公共的一个,并且穿过所述选择栅的宽度方向上的相互不同的位置 电极。
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公开(公告)号:US3973127A
公开(公告)日:1976-08-03
申请号:US619963
申请日:1975-10-06
申请人: Tadayoshi Matsuda , Mitsuo Yuasa , Kenji Aoyama
发明人: Tadayoshi Matsuda , Mitsuo Yuasa , Kenji Aoyama
CPC分类号: G03B42/025 , A61B6/032
摘要: An X-ray tomography apparatus includes an X-ray tube, a collimator device and a film, which are revolved about an object body of medical examination in the same direction and at the same speed. The collimator device and the film are also rotated about their axes in the same direction and at the same speed.
摘要翻译: X射线断层摄影装置包括以相同方向和相同速度围绕医疗检查对象体旋转的X射线管,准直器装置和膜。 准直器装置和胶片也以相同方向和相同的速度围绕它们的轴线旋转。
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