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公开(公告)号：US07803257B2
公开(公告)日：2010-09-28
申请号：US10971836
申请日：2004-10-22
申请人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
发明人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
CPC分类号： H01L21/2885 , C25D17/001 , C25D17/12 , Y10T29/49208 , Y10T29/53204
摘要： A current-leveling electrode for improving electroplating and electrochemical polishing uniformity in the electrochemical plating or electropolishing of metals on a substrate is disclosed. The current-leveling electrode includes a base electrode and at least one sub-electrode carried by the base electrode. The at least one sub-electrode has a width which is less than a width of the base electrode to impart a generally tapered, stepped or convex configuration to the current-leveling electrode.
摘要翻译： 公开了一种用于改善电化学电镀中的电镀和电化学抛光均匀性的电流调节电极或对基底上的金属的电解抛光。 电流调平电极包括基极和由基极承载的至少一个子电极。 所述至少一个子电极的宽度小于所述基极的宽度，以赋予所述电流调平电极大致锥形，阶梯形或凸形的构造。
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公开(公告)号：US08099861B2
公开(公告)日：2012-01-24
申请号：US12854214
申请日：2010-08-11
申请人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
发明人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
CPC分类号： H01L21/2885 , C25D17/001 , C25D17/12 , Y10T29/49208 , Y10T29/53204
摘要： A current-leveling electrode for improving electroplating and electrochemical polishing uniformity in the electrochemical plating or electropolishing of metals on a substrate is disclosed. The current-leveling electrode includes a base electrode and at least one sub-electrode carried by the base electrode. The at least one sub-electrode has a width which is less than a width of the base electrode to impart a generally tapered, stepped or convex configuration to the current-leveling electrode.
摘要翻译： 公开了一种用于改善电化学电镀中的电镀和电化学抛光均匀性的电流调节电极或对基底上的金属的电解抛光。 电流调平电极包括基极和由基极承载的至少一个子电极。 所述至少一个子电极的宽度小于所述基极的宽度，以赋予所述电流调平电极大致锥形，阶梯形或凸形的构造。
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公开(公告)号：US20100314256A1
公开(公告)日：2010-12-16
申请号：US12854214
申请日：2010-08-11
申请人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
发明人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
CPC分类号： H01L21/2885 , C25D17/001 , C25D17/12 , Y10T29/49208 , Y10T29/53204
摘要： A current-leveling electrode for improving electroplating and electrochemical polishing uniformity in the electrochemical plating or electropolishing of metals on a substrate is disclosed. The current-leveling electrode includes a base electrode and at least one sub-electrode carried by the base electrode. The at least one sub-electrode has a width which is less than a width of the base electrode to impart a generally tapered, stepped or convex configuration to the current-leveling electrode.
摘要翻译： 公开了一种用于改善电化学电镀中的电镀和电化学抛光均匀性的电流调节电极或对基底上的金属的电解抛光。 电流调平电极包括基极和由基极承载的至少一个子电极。 所述至少一个子电极的宽度小于所述基极的宽度，以赋予所述电流调平电极大致锥形，阶梯形或凸形的构造。
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公开(公告)号：US20060086609A1
公开(公告)日：2006-04-27
申请号：US10971836
申请日：2004-10-22
申请人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
发明人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen
IPC分类号： C25B11/02
CPC分类号： H01L21/2885 , C25D17/001 , C25D17/12 , Y10T29/49208 , Y10T29/53204
摘要： A current-leveling electrode for improving electroplating and electrochemical polishing uniformity in the electrochemical plating or electropolishing of metals on a substrate is disclosed. The current-leveling electrode includes a base electrode and at least one sub-electrode carried by the base electrode. The at least one sub-electrode has a width which is less than a width of the base electrode to impart a generally tapered, stepped or convex configuration to the current-leveling electrode.
摘要翻译： 公开了一种用于改善电化学电镀中的电镀和电化学抛光均匀性的电流调节电极或对基底上的金属的电解抛光。 电流调平电极包括基极和由基极承载的至少一个子电极。 所述至少一个子电极的宽度小于所述基极的宽度，以赋予所述电流调平电极大致锥形，阶梯形或凸形的构造。
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5.发明申请Novel ECP method for preventing the formation of voids and contamination in vias 审中-公开用于防止通孔中形成空隙和污染的新型ECP方法公开(公告)号：US20050236181A1
公开(公告)日：2005-10-27
申请号：US10917543
申请日：2004-08-12
申请人： Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen , Ching-Hwan Su , Yu-Ku Lin , Ying-Lang Wang , De-Dui Liao , Meng-Chao Tzeng
发明人： Kei-Wei Chen , Shih-Ho Lin , Chun-Chang Chen , Ching-Hwan Su , Yu-Ku Lin , Ying-Lang Wang , De-Dui Liao , Meng-Chao Tzeng
IPC分类号： H01L21/768 , H01L23/522 , H05K1/03 , H05K1/09 , H05K1/11
CPC分类号： H01L21/76816 , H01L21/76807 , H01L23/5226 , H01L2924/0002 , Y10T29/49165 , H01L2924/00
摘要： A method for preventing the formation of voids and contaminants in vias during the fabrication of a metal interconnect structure such as a dual damascene structure is disclosed. The method includes providing a substrate; providing a dielectric layer having trench openings and via openings on the substrate, wherein the ratio of the sum of the areas of the trench openings to the sum of the areas of the via openings is between 1 and 300; wherein the via opening bottom has a width of less than about 25 μm; and electroplating a metal in the trench openings and via openings. An interconnect structure having at least one void-free via is further disclosed.
摘要翻译： 公开了一种用于在金属互连结构例如双镶嵌结构的制造期间防止在通孔中形成空隙和污染物的方法。 该方法包括提供基板; 在衬底上提供具有沟槽开口和通孔开口的电介质层，其中沟槽开口的面积之和与通路孔的面积之和的比值在1和300之间; 其中所述通孔开口底部具有小于约25μm的宽度; 以及在沟槽开口和通孔中电镀金属。 还公开了具有至少一个无空隙通孔的互连结构。
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公开(公告)号：US08247322B2
公开(公告)日：2012-08-21
申请号：US11680981
申请日：2007-03-01
IPC分类号： H01L21/44
CPC分类号： H01L21/76831 , H01L21/7684
摘要： A method for forming a semiconductor structure includes forming a dielectric layer over a substrate. A first non-conductive barrier layer is formed over the dielectric layer. At least one opening is formed through the first non-conductive barrier layer and within the dielectric layer. A second non-conductive barrier layer is formed over the first non-conductive barrier layer and within the opening. At least a portion of the second non-conductive barrier layer is removed, thereby at least partially exposing a top surface of the first non-conductive barrier layer and a bottom surface of the opening, with the second non-conductive barrier layer remaining on sidewalls of the opening. A seed layer and conductive layer is then formed and a single polishing operation removes the seed layer and conductive layer.
摘要翻译： 形成半导体结构的方法包括在衬底上形成电介质层。 在电介质层上形成第一非导电阻挡层。 通过第一非导电阻挡层和介电层内形成至少一个开口。 在第一非导电阻挡层上并在开口内形成第二非导电阻挡层。 去除第二非导电阻挡层的至少一部分，从而至少部分地暴露第一非导电阻挡层的顶表面和开口的底表面，而第二非导电阻挡层保留在侧壁上 的开幕。 然后形成种子层和导电层，并且单次抛光操作去除种子层和导电层。
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公开(公告)号：US08551193B2
公开(公告)日：2013-10-08
申请号：US13188182
申请日：2011-07-21
申请人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen
发明人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen
IPC分类号： C22C19/03 , H01L21/283
CPC分类号： H01L29/45 , C23C14/14 , C23C14/3414 , H01L21/28052 , H01L21/28518 , H01L21/2855 , H01L21/823418 , H01L29/456 , H01L29/665 , Y10T29/41
摘要： A target includes nickel and a secondary metal. The secondary metal has a volume percentage between about 1 percent and about 10 percent. The secondary metal has a density between about 5,000 kg/m3 and about 15,000 kg/m3.
摘要翻译： 目标包括镍和二次金属。 次级金属的体积百分比在约1％至约10％之间。 二次金属具有约5,000kg / m 3至约15,000kg / m 3的密度。
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公开(公告)号：US20080211106A1
公开(公告)日：2008-09-04
申请号：US11680981
申请日：2007-03-01
IPC分类号： H01L21/4763
CPC分类号： H01L21/76831 , H01L21/7684
摘要： A method for forming a semiconductor structure includes forming a dielectric layer over a substrate. A first non-conductive barrier layer is formed over the dielectric layer. At least one opening is formed through the first non-conductive barrier layer and within the dielectric layer. A second non-conductive barrier layer is formed over the first non-conductive barrier layer and within the opening. At least a portion of the second non-conductive barrier layer is removed, thereby at least partially exposing a top surface of the first non-conductive barrier layer and a bottom surface of the opening, with the second non-conductive barrier layer remaining on sidewalls of the opening. A seed layer and conductive layer is then formed and a single polishing operation removes the seed layer and conductive layer.
摘要翻译： 形成半导体结构的方法包括在衬底上形成电介质层。 在电介质层上形成第一非导电阻挡层。 通过第一非导电阻挡层和介电层内形成至少一个开口。 在第一非导电阻挡层上并在开口内形成第二非导电阻挡层。 去除第二非导电阻挡层的至少一部分，从而至少部分地暴露第一非导电阻挡层的顶表面和开口的底表面，而第二非导电阻挡层保留在侧壁上 的开幕。 然后形成种子层和导电层，并且单次抛光操作去除种子层和导电层。
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公开(公告)号：US20130020617A1
公开(公告)日：2013-01-24
申请号：US13188182
申请日：2011-07-21
申请人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen
发明人： Shih-Chieh Chang , Ying-Lang Wang , Kei-Wei Chen
CPC分类号： H01L29/45 , C23C14/14 , C23C14/3414 , H01L21/28052 , H01L21/28518 , H01L21/2855 , H01L21/823418 , H01L29/456 , H01L29/665 , Y10T29/41
摘要： A target includes nickel and a secondary metal. The secondary metal has a volume percentage between about 1 percent and about 10 percent. The secondary metal has a density between about 5,000 kg/m3 and about 15,000 kg/m3.
摘要翻译： 目标包括镍和二次金属。 次级金属的体积百分比在约1％至约10％之间。 二次金属具有约5,000kg / m 3至约15,000kg / m 3的密度。
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公开(公告)号：US20070252277A1
公开(公告)日：2007-11-01
申请号：US11380666
申请日：2006-04-28
申请人： Jung-Chih Tsao , Kei-Wei Chen , Shih-Chieh Chang , Yu-Ku Lin , Ying-Lang Wang
发明人： Jung-Chih Tsao , Kei-Wei Chen , Shih-Chieh Chang , Yu-Ku Lin , Ying-Lang Wang
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/485 , H01L21/76844 , H01L21/76865 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device. The semiconductor device includes a substrate, a dielectric layer formed thereon, an opening formed in the dielectric layer, a first barrier layer overlying the sidewall of the opening, a second barrier layer overlying the first barrier layer and the bottom of the opening, and a conductive layer filled into the opening. The invention also provides a method of fabricating the semiconductor device.
摘要翻译： 半导体器件。 所述半导体器件包括：衬底，形成在其上的电介质层，形成在所述电介质层中的开口;覆盖所述开口侧壁的第一阻挡层，覆盖所述第一阻挡层和所述开口底部的第二势垒层;以及 导电层填充入开口。 本发明还提供一种制造半导体器件的方法。
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