Memory device with a sense amplifier detection circuit to control an output buffer amplifier
    1.
    发明授权
    Memory device with a sense amplifier detection circuit to control an output buffer amplifier 有权
    具有读出放大器检测电路的存储器件,用于控制输出缓冲放大器

    公开(公告)号:US06434057B1

    公开(公告)日:2002-08-13

    申请号:US09682306

    申请日:2001-08-16

    IPC分类号: G11C700

    CPC分类号: G11C7/1051

    摘要: A memory device has an output buffer. The output buffer is electrically connected to a data output port of a sense amplifier of the memory device for amplifying an output signal from the data output port. The output buffer has a detector for producing a control signal according to the output signal from the data output port, and an amplifier for amplifying the output signal from the data output port. The amplifier has an input port electrically connected to the data output port for accepting the output signal from the data output port, and a control terminal electrically connected to the output terminal of the detector for accepting the control signal from the detector to control operations of the amplifier. When the detector produces the control signal and transmits the control signal to the control terminal of the amplifier, the amplifier begins amplifying the output signal transmitted from the data output port to the input port of the amplifier.

    摘要翻译: 存储器件具有输出缓冲器。 输出缓冲器电连接到存储器件的读出放大器的数据输出端口,用于放大来自数据输出端口的输出信号。 输出缓冲器具有根据来自数据输出端口的输出信号产生控制信号的检测器和用于放大来自数据输出端口的输出信号的放大器。 放大器具有电连接到数据输出端口的输入端口,用于接收来自数据输出端口的输出信号,以及控制端子,电连接到检测器的输出端子,用于接收来自检测器的控制信号,以控制 放大器 当检测器产生控制信号并将控制信号发送到放大器的控制端时,放大器开始将从数据输出端口传输到输出端口的输出信号放大。

    Method and apparatus thereof for burn-in testing of a static random access memory
    2.
    发明授权
    Method and apparatus thereof for burn-in testing of a static random access memory 失效
    一种用于静态随机存取存储器的老化测试的方法和装置

    公开(公告)号:US06414889B1

    公开(公告)日:2002-07-02

    申请号:US09681989

    申请日:2001-07-03

    IPC分类号: G11C700

    CPC分类号: G11C29/12

    摘要: A apparatus uses a test method to perform burn-in testing of a static random access memory that has a plurality of word lines, a plurality of first bit lines, a plurality of second bit lines, and a plurality of memory cells for storing data. Each of the memory cells is coupled to a corresponding word line, a corresponding first bit line, a corresponding second bit line, and a power supply that is used to apply a working voltage to the memory cell to drive the memory cell. When the apparatus tests the static random access memory, the apparatus adjusts the working voltage according to a potential of the word lines and voltage gaps between the first bit lines and the second bit lines.

    摘要翻译: 一种装置使用测试方法来执行具有多个字线,多个第一位线,多个第二位线和用于存储数据的多个存储器单元的静态随机存取存储器的老化测试。 每个存储器单元耦合到对应的字线,对应的第一位线,相应的第二位线和用于将工作电压施加到存储器单元以驱动存储器单元的电源。 当该装置测试静态随机存取存储器时,该装置根据字线的电位和第一位线与第二位线之间的电压间隙调整工作电压。

    Delay lock circuit using bisection algorithm and related method
    3.
    发明授权
    Delay lock circuit using bisection algorithm and related method 有权
    延迟锁电路采用二分法算法及相关方法

    公开(公告)号:US06900678B2

    公开(公告)日:2005-05-31

    申请号:US09682303

    申请日:2001-08-16

    IPC分类号: H03L7/081 H03L7/10 H03L7/06

    CPC分类号: H03L7/0814 H03L7/10

    摘要: A method for performing a delay lock to generate a second clock according to a first clock and to synchronize the second clock with the first clock is provided. The method has correcting processes executed to increase or decrease, by a correction interval, a delay time between corresponding periods of the first clock and the second clock. The correction interval for a subsequent correcting process is substantially half the previous correction interval of the previous correcting process.

    摘要翻译: 提供一种用于执行延迟锁以根据第一时钟产生第二时钟并使第二时钟与第一时钟同步的方法。 该方法具有执行校正处理,以通过校正间隔增加或减少第一时钟和第二时钟的相应周期之间的延迟时间。 用于后续校正处理的校正间隔实际上是先前校正处理的先前校正间隔的一半。

    Burn-in methods for static random access memories and chips
    4.
    发明授权
    Burn-in methods for static random access memories and chips 有权
    静态随机存取存储器和芯片的老化方法

    公开(公告)号:US07916519B2

    公开(公告)日:2011-03-29

    申请号:US12368218

    申请日:2009-02-09

    IPC分类号: G11C11/00

    摘要: A burn-in method for SRAMs and chips. For a memory cell of the SRAM, the SRAM burn-in method controls the control signals of the memory cell to generate current paths to pass through the memory cell, the corresponding bit-line and the corresponding bit-line-bar. The contacts/vias in the current paths are tested by providing burn-in currents to flow through the current paths, so that mismatched contacts/vias are burned by the burn-in currents. SRAMs that fail the burn-in test are abandoned after the burn-in procedure.

    摘要翻译: 一种SRAM和芯片的老化方法。 对于SRAM的存储单元,SRAM老化方法控制存储器单元的控制信号,以产生通过存储单元,对应位线和相应位线条的电流路径。 通过提供老化电流流过电流路径来测试电流路径中的触点/通孔,从而使不匹配的触点/通孔被老化电流烧毁。 老化测试失败的SRAM在老化过程之后被放弃。

    BURN-IN METHODS FOR STATIC RANDOM ACCESS MEMORIES AND CHIPS
    5.
    发明申请
    BURN-IN METHODS FOR STATIC RANDOM ACCESS MEMORIES AND CHIPS 有权
    用于静态随机存取存储器和存储器的烧录方法

    公开(公告)号:US20100202219A1

    公开(公告)日:2010-08-12

    申请号:US12368218

    申请日:2009-02-09

    IPC分类号: G11C7/00 G11C29/00

    摘要: A burn-in method for SRAMs and chips. For a memory cell of the SRAM, the SRAM burn-in method controls the control signals of the memory cell to generate current paths to pass through the memory cell, the corresponding bit-line and the corresponding bit-line-bar. The contacts/vias in the current paths are tested by providing burn-in currents to flow through the current paths, so that mismatched contacts/vias are burned by the burn-in currents. SRAMs that fail the burn-in test are abandoned after the burn-in procedure.

    摘要翻译: 一种SRAM和芯片的老化方法。 对于SRAM的存储单元,SRAM老化方法控制存储器单元的控制信号,以产生通过存储单元,对应位线和相应位线条的电流路径。 通过提供老化电流流过电流路径来测试电流路径中的触点/通孔,从而使不匹配的触点/通孔被老化电流烧毁。 老化测试失败的SRAM在老化过程之后被放弃。

    Semiconductor programmable device
    6.
    发明申请
    Semiconductor programmable device 审中-公开
    半导体可编程器件

    公开(公告)号:US20050104129A1

    公开(公告)日:2005-05-19

    申请号:US10817777

    申请日:2004-04-02

    CPC分类号: H01L27/0629

    摘要: A semiconductor programmable device is provided. The semiconductor programmable device comprises a P-type substrate, an N-well, an NMOS capacitor and a PMOS transistor. The N-well is formed in the P-type substrate. The NMOS capacitor is configured on the P-type substrate. The PMOS transistor is configured on the N-well. A source/drain of the PMOS transistor is electrically connected to a gate of the NMOS capacitor. A control voltage is applied to a gate of the PMOS transistor. A programming voltage is applied to the source/drain of the PMOS transistor. The programming voltage is large enough to cause a breakdown of a gate oxide layer of the NMOS capacitor. The gate oxide layer of the NMOS capacitor has a thickness identical to the gate oxide layer of the PMOS transistor.

    摘要翻译: 提供半导体可编程器件。 半导体可编程器件包括P型衬底,N阱,NMOS电容器和PMOS晶体管。 在P型衬底中形成N阱。 NMOS电容器配置在P型基板上。 PMOS晶体管配置在N阱上。 PMOS晶体管的源极/漏极电连接到NMOS电容器的栅极。 控制电压施加到PMOS晶体管的栅极。 对PMOS晶体管的源极/漏极施加编程电压。 编程电压足够大,导致NMOS电容器的栅极氧化层的击穿。 NMOS电容器的栅极氧化层具有与PMOS晶体管的栅氧化层相同的厚度。

    Poly fuse burning system
    7.
    发明授权
    Poly fuse burning system 有权
    聚熔丝燃烧系统

    公开(公告)号:US08441306B2

    公开(公告)日:2013-05-14

    申请号:US13047567

    申请日:2011-03-14

    IPC分类号: H01H37/76 H01H85/00

    CPC分类号: G11C17/16

    摘要: This invention provides a poly fuse burning system comprising a poly fuse, a controllable power source supplying power for burning the poly fuse, and a monitor circuit monitoring the burning state of the poly fuse, wherein when a targeted burning state is reached, a control signal is output to shut down the controllable power source to stop the burning.

    摘要翻译: 本发明提供一种多熔丝燃烧系统,包括多晶硅熔丝,提供用于燃烧多晶硅熔丝的功率的可控电源,以及监控多晶硅熔丝的燃烧状态的监控电路,其中当达到目标燃烧状态时,控制信号 输出关闭可控电源以停止燃烧。

    Static random access memory
    8.
    发明授权
    Static random access memory 有权
    静态随机存取存储器

    公开(公告)号:US07755925B2

    公开(公告)日:2010-07-13

    申请号:US11636524

    申请日:2006-12-11

    IPC分类号: G11C11/00

    CPC分类号: G11C11/412 G11C11/413

    摘要: A static random access memory comprising a column driver, a row driver, a cell, and a control unit is disclosed. The column driver selects a first word line or a second word line. The row provides data to a first bit line and a second bit line. The data of the first bit line is opposite to that of the second bit line. The control unit controls the voltage of the cell. In normal mode, the voltage of the cell is equal to a second voltage. In stand-by mode, the voltage of the cell exceeds the second voltage.

    摘要翻译: 公开了一种包括列驱动器,行驱动器,单元和控制单元的静态随机存取存储器。 列驱动器选择第一字线或第二字线。 该行将数据提供给第一位线和第二位线。 第一位线的数据与第二位线的数据相反。 控制单元控制电池的电压。 在正常模式下,电池的电压等于第二电压。 在待机模式下,电池的电压超过第二电压。

    Memory system
    9.
    发明授权
    Memory system 有权
    内存系统

    公开(公告)号:US07706203B2

    公开(公告)日:2010-04-27

    申请号:US12191116

    申请日:2008-08-13

    IPC分类号: G11C5/14

    CPC分类号: G11C11/417 G11C5/147 G11C8/08

    摘要: A memory system is provided, comprising at least one memory unit and a source power supply circuit. Each memory unit is coupled between a source voltage and a ground voltage and accesses digital data according to a word line signal and a bit line signal. The source power supply circuit provides the source voltage to the memory units. When the memory unit is in a writing status, the source voltage is the first power voltage. When the memory unit is in a reading status, the source voltage is the second power voltage. The second power voltage equals to the first power voltage subtracted by a specific voltage for avoiding rewriting error.

    摘要翻译: 提供一种存储器系统,包括至少一个存储器单元和源极电源电路。 每个存储器单元耦合在源电压和接地电压之间,并根据字线信号和位线信号访问数字数据。 源电源电路将源电压提供给存储器单元。 当存储器单元处于写入状态时,源电压是第一个电源电压。 当存储器单元处于读取状态时,源电压是第二个电源电压。 第二电源电压等于由特定电压减去的第一个电源电压,以避免重写错误。

    Stroller backrest tilting adjusting device
    10.
    发明授权
    Stroller backrest tilting adjusting device 有权
    手推车靠背倾斜调节装置

    公开(公告)号:US07128326B2

    公开(公告)日:2006-10-31

    申请号:US10940086

    申请日:2004-09-14

    申请人: Jui-Lung Chen

    发明人: Jui-Lung Chen

    IPC分类号: B62B7/06

    CPC分类号: B62B9/104 B62B9/102

    摘要: A stroller backrest tilting adjusting device is provided. The stroller backrest tilting adjusting device comprises two supporting straps for supporting the backrest of the stroller, each supporting strap having a fixed end attached to a frame of the stroller and a free end; a strap direction guiding unit allowing the free end of each of the straps to pass therethrough and guiding the straps' direction; and an adjusting assembly fixed to an upper portion of the backrest which is capable of adjusting the effective supporting length of the straps to thereby adjusting the tilting angle of the backrest of the stroller by operating a one-way locking member, which is disposed in the adjusting assembly and has a cam effecting portion for increasingly exerting locking force.

    摘要翻译: 提供了一种婴儿车靠背倾斜调节装置。 婴儿车靠背倾斜调节装置包括用于支撑婴儿车靠背的两个支撑带,每个支撑带具有附接到婴儿车的框架的固定端和自由端; 带状方向引导单元,其允许每个带的自由端穿过并引导带的方向; 以及固定到靠背上部的调节组件,其能够调节带的有效支撑长度,从而通过操作单向锁定构件来调节婴儿车靠背的倾斜角度,该单向锁定构件设置在 并且具有用于越来越多地施加锁定力的凸轮效果部分。