公开(公告)号：US5731637A

公开(公告)日：1998-03-24

申请号：US687032

申请日：1996-07-25

申请人： Shizue Hori ,  Akihiko Osawa ,  Yoshiro Baba ,  Shigeo Yawata

发明人： Shizue Hori ,  Akihiko Osawa ,  Yoshiro Baba ,  Shigeo Yawata

IPC分类号： H01L29/74 ,  H01L21/265 ,  H01L21/322 ,  H01L21/332 ,  H01L29/08 ,  H01L23/58

CPC分类号： H01L29/66363 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/3221 ,  H01L29/083

摘要： The object of the present invention is to provide a method of manufacturing high-performance, high-breakdown-voltage semiconductor devices which suppresses an increase in the junction leakage current due to heavy metal contamination without increasing the number of manufacturing steps. A method of manufacturing semiconductor devices according to the invention, comprises the steps of ion-implanting one or more elements selected from a group of silicon, carbon, nitrogen, oxygen, hydrogen, argon, helium, and xenon into at least one surface of a semiconductor substrate of a first conductivity type at a dose of 1.times.10.sup.15 cm.sup.-2 or more to form a distortion layer, oxidizing the surface of the substrate to form an oxide film, ion-implanting impurities of a second conductivity type at a low concentration (a dose of less than 1.times.10.sup.15 cm.sup.-2) via the oxide film into the one surface of the substrate, ion-implanting impurities of the second conductivity type at a high concentration (a dose of 1.times.10.sup.15 cm.sup.-2 or more) via the oxide film into the other surface of the substrate, and forming a junction by heat treatment.

摘要翻译： 本发明的目的是提供一种制造高性能，高耐击穿电压半导体器件的方法，其抑制由于重金属污染导致的结漏电流的增加，而不增加制造步骤的数量。 根据本发明的制造半导体器件的方法包括以下步骤：将选自硅，碳，氮，氧，氢，氩，氦和氙的一种或多种元素离子注入至 以1×10 15 cm -2以上的剂量的第一导电类型的半导体衬底形成失真层，氧化衬底的表面以形成氧化膜，以低浓度离子注入第二导电类型的杂质（a 通过该氧化膜将该剂量小于1×10 15 cm -2）通过氧化膜以高浓度（1×10 15 cm -2以上的剂量）将第二导电型的杂质离子注入到 衬底的另一个表面，并通过热处理形成结。

公开(公告)号：US4451303A

公开(公告)日：1984-05-29

申请号：US455795

申请日：1983-01-05

申请人： Shunichi Hiraki ,  Kiyoshi Kikuchi ,  Shigeo Yawata ,  Masafumi Miyagawa

发明人： Shunichi Hiraki ,  Kiyoshi Kikuchi ,  Shigeo Yawata ,  Masafumi Miyagawa

IPC分类号： H01L21/225 ,  H01L21/265

CPC分类号： H01L21/2256

摘要： A method for producing a semiconductor element which can form a deep P-type impurity region by a diffusion of aluminum. A porous alumina layer is first formed on a semiconductor substrate. Then, a diffusion-protective layer formed of a material having a large oxygen-diffusion-inhibiting ability such as Al.sub.2 O.sub.3 is formed on the porous alumina layer. Subsequently, aluminum ions are implanted in the porous alumina layer through the diffusion-protective layer. Thereafter, a heat treatment is performed to diffuse the aluminum of the aluminum ion-implanted region in the semiconductor substrate, and a P-type impurity region is formed. Alternatively, a porous alumina layer is formed on the semiconductor substrate, and an aluminum layer is then formed thereon. The diffusion-protective layer is formed on the aluminum layer, and a heat treatment is then performed, thereby diffusing the aluminum forming the aluminum layer in the semiconductor substrate, and a P-type impurity region is thus formed.

摘要翻译： 一种可通过铝的扩散形成深P型杂质区的半导体元件的制造方法。 首先在半导体衬底上形成多孔氧化铝层。 然后，在多孔氧化铝层上形成由具有大的氧扩散抑制能力的材料形成的扩散保护层，如Al2O3。 随后，通过扩散保护层将铝离子注入到多孔氧化铝层中。 此后，进行热处理以使半导体衬底中的铝离子注入区的铝扩散，形成P型杂质区。 或者，在半导体衬底上形成多孔氧化铝层，然后在其上形成铝层。 在铝层上形成扩散保护层，然后进行热处理，从而使形成铝层的铝在半导体衬底中扩散，由此形成P型杂质区。

公开(公告)号：US5130261A

公开(公告)日：1992-07-14

申请号：US578603

申请日：1990-09-07

申请人： Yoshikazu Usuki ,  Shigeo Yawata ,  Jun-ichi Okano ,  Shigeru Moriyama ,  Shun-ichi Hiraki

发明人： Yoshikazu Usuki ,  Shigeo Yawata ,  Jun-ichi Okano ,  Shigeru Moriyama ,  Shun-ichi Hiraki

IPC分类号： H01L21/225 ,  H01L21/265 ,  H01L21/324 ,  H01L21/329 ,  H01L29/866

CPC分类号： H01L29/66098 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/324 ,  Y10S148/015 ,  Y10S148/174

摘要： According to this invention, there is provided to a method of manufacturing semiconductor devices including the steps of ion-implanting at least one impurity selected from As, P, Sb, Si, B, Ga, and Al in a wafer prior to a predetermined manufactural process of semiconductor devices in the semiconductor wafer grown by the Czochralski technique, and thereafter annealing the wafer at a temperature of at least 900.degree. C. Nonuniformity of an impurity concentration of the wafer can be improved. The difference in characteristics among the semiconductor devices manufactured in the wafer is decreased, a product yield can be increased, and the quality of the semiconductor devices can be improved.

公开(公告)号：US5015593A

公开(公告)日：1991-05-14

申请号：US522787

申请日：1990-05-14

申请人： Shigeo Yawata ,  Kazuhisa Shibao ,  Shun-ichi Hiraki

发明人： Shigeo Yawata ,  Kazuhisa Shibao ,  Shun-ichi Hiraki

IPC分类号： H01L27/092 ,  H01L21/225 ,  H01L21/265 ,  H01L21/28 ,  H01L21/321 ,  H01L21/322 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/78

CPC分类号： H01L29/66712 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/321 ,  H01L21/32105 ,  H01L21/3221 ,  H01L29/7802 ,  H01L29/42368 ,  Y10S148/078 ,  Y10S438/907 ,  Y10S438/909

摘要： In order to eliminate unwanted crystal defects generated by an ion implantation, a semiconductor substrate or an epitaxial layer, which is selectively subjected to an impurity ion implantation, is heat-treated in an inert gas atmosphere at 850.degree. to 1050.degree. C. to recrystallize the implanted region. Thereafter, the semiconductor substrate is heat-treated at 900.degree. to 1250.degree. C. in an atmosphere containing oxygen. For eliminating abnormal growth of grain boundaries in a polycrystalline semiconductor layer deposited on an insulating film the semiconductor layer is heat-treated at 900.degree. to 1100.degree. C. in an atmosphere containing oxygen. By applying at least one of these processes to usual fabrication methods, semiconductor devices with high reliabilty such as power MOSFETs will be provided.