摘要:
A technique includes using a pass device of a linear regulator to provide an output signal for the linear regulator in response to a signal that is received at a control terminal of the pass device. The control terminal is coupled to a node, and the node is associated with a bias current. The technique includes using a feedback path to communicate a feedback current with the node to regulate the output signal. The use of the feedback path includes regulating a magnitude of the feedback current to be within a range of magnitudes, which include a magnitude that exceeds a magnitude of the bias current.
摘要:
A successive approximation register (SAR) ADC includes an SAR comparator circuit including first and second inputs, a control input, and first and second outputs. The SAR comparator circuit further includes a plurality of capacitors coupled to the first and second inputs and includes a plurality of switches configured to couple the plurality of capacitors to one of a first voltage and a second voltage. The SAR ADC further includes a calibration circuit coupled to the first and second outputs and to the control input of the SAR comparator. The calibration circuit is configured to control the plurality of switches to selectively couple the plurality of capacitors to one of the first and second voltages to provide a calibration signal to the SAR comparator circuit. The calibration circuit is configured to calibrate the SAR comparator based on corresponding output signals at the first and second outputs.
摘要翻译:逐次逼近寄存器(SAR)ADC包括包括第一和第二输入,控制输入以及第一和第二输出的SAR比较器电路。 SAR比较器电路还包括耦合到第一和第二输入的多个电容器,并且包括被配置为将多个电容器耦合到第一电压和第二电压中的一个的多个开关。 SAR ADC还包括耦合到第一和第二输出和SAR比较器的控制输入的校准电路。 校准电路被配置为控制多个开关以选择性地将多个电容器耦合到第一和第二电压之一,以向SAR比较器电路提供校准信号。 校准电路被配置为基于在第一和第二输出处的相应输出信号校准SAR比较器。
摘要:
A voltage reference circuit includes a capacitor including a first terminal and including a second terminal coupled to a power supply node. The voltage reference circuit further includes an amplifier, a first transistor, and a switch. The amplifier includes a first input configured to receive a reference voltage input signal, a second input configured to receive a feedback signal, and an output. The first transistor includes a source coupled to the second input of the amplifier and to an output node, a gate coupled to the capacitor, and a drain. The first transistor is configured to provide a reference voltage at the source based on a charge provided to the gate by the capacitor. The switch includes a first terminal coupled to the output of the amplifier, and includes a second terminal coupled to the first terminal of the capacitor.
摘要:
A digital-to-analog converter (DAC) with a digital segment having a digital data input and an analog segment coupled to the digital segment and having an analog output to output an analog signal corresponding to the digital data. The analog segment includes one or more gain stages and a feedback structure to couple the analog output to the one or more gain stages to attenuate signal distortion at the analog output. A combined gain of the one or more gain stages determines a signal distortion attenuation characteristic of the analog segment.
摘要:
An integrated circuit having voltage isolation capabilities comprising a first galvanically isolated area of the integrated circuit containing a first group of functional circuitry for processing a data stream. The first group of functional circuitry located in a substrate of the integrated circuit. Capacitive isolation circuitry located in conductive layers of the integrated circuit provides a high voltage isolation link between the first group of functional circuitry and a second group of functional circuitry connected to the integrated circuit through the capacitive isolation circuitry. The capacitive isolation circuitry includes a differential transmitter for transmitting data in a differential signal to the second group of functional circuitry via the capacitive isolation circuitry. A differential receiver receives data within the differential signal from the second group of functional circuitry via the capacitive isolation circuitry. A detector circuit within the differential receiver detects the received data. The detector circuit monitors the differential signal and generates a first logical output when a voltage generated responsive to the differential signal exceeds a programmable voltage threshold level and generates a second logical output when the voltage generated responsive to the differential signal falls below the programmable voltage threshold level.
摘要:
A voltage reference circuit includes a capacitor including a first terminal and including a second terminal coupled to a power supply node. The voltage reference circuit further includes an amplifier, a first transistor, and a switch. The amplifier includes a first input configured to receive a reference voltage input signal, a second input configured to receive a feedback signal, and an output. The first transistor includes a source coupled to the second input of the amplifier and to an output node, a gate coupled to the capacitor, and a drain. The first transistor is configured to provide a reference voltage at the source based on a charge provided to the gate by the capacitor. The switch includes a first terminal coupled to the output of the amplifier, and includes a second terminal coupled to the first terminal of the capacitor.
摘要:
An integrated circuit includes a conductive substrate pick-up region in the substrate that forms a perimeter around a portion of the substrate. Conductive stripes traverse the portion of the substrate within the perimeter and are coupled to a low impedance node along with the substrate pick-up region. A capacitor has a bottom plate formed above the conductive stripes. The pick-up region and the conductive stripes absorb injected current caused by parasitic capacitance between the bottom plate of the capacitor and the substrate region thereby reducing cross-talk caused by the injected current.
摘要:
An apparatus and method for utilizing a correction loop amplifier in conjunction with a main amplifier to produce signal amplification with low total harmonic distortion. The correction amplifier preferably has one input directly coupled to a first input of the main amplifier, and an output coupled to a second input of the main amplifier via a resistor. The second input of the correction amplifier is preferably coupled to a signal input via a voltage divider or RC network. A preferred embodiment configuration provides a power amplifier with improved THD over prior art circuits. The circuit is very flexible, and may incorporate low, high or band pass filter functions if desired. In addition, the power amplifier may be implemented in any combination of single or differential inputs and outputs.
摘要:
A voltage regulator circuit with variable feedback is disclosed. In one embodiment, a voltage regulator includes an amplifier having a first input configured to receive a reference voltage and a second input configured to receive a feedback signal. The voltage regulator further includes first and second transistors each having respective gate terminals coupled to an output of the amplifier. A resistor network coupled to the second input of the amplifier and further coupled to the first and second transistors. The resistor network is configured to produce the feedback signal based on currents through the first and second transistors, respectively.
摘要:
A successive approximation register (SAR) ADC includes an SAR comparator circuit including first and second inputs, a control input, and first and second outputs. The SAR comparator circuit further includes a plurality of capacitors coupled to the first and second inputs and includes a plurality of switches configured to couple the plurality of capacitors to one of a first voltage and a second voltage. The SAR ADC further includes a calibration circuit coupled to the first and second outputs and to the control input of the SAR comparator. The calibration circuit is configured to control the plurality of switches to selectively couple the plurality of capacitors to one of the first and second voltages to provide a calibration signal to the SAR comparator circuit. The calibration circuit is configured to calibrate the SAR comparator based on corresponding output signals at the first and second outputs.
摘要翻译:逐次逼近寄存器(SAR)ADC包括包括第一和第二输入,控制输入以及第一和第二输出的SAR比较器电路。 SAR比较器电路还包括耦合到第一和第二输入的多个电容器,并且包括被配置为将多个电容器耦合到第一电压和第二电压之一的多个开关。 SAR ADC还包括耦合到第一和第二输出和SAR比较器的控制输入的校准电路。 校准电路被配置为控制多个开关以选择性地将多个电容器耦合到第一和第二电压之一,以向SAR比较器电路提供校准信号。 校准电路被配置为基于在第一和第二输出处的相应输出信号校准SAR比较器。