公开(公告)号：US20110180796A1

公开(公告)日：2011-07-28

申请号：US13008285

申请日：2011-01-18

申请人： Shunpei YAMAZAKI ,  Hiromichi GODO ,  Hideomi SUZAWA ,  Shinya SASAGAWA ,  Motomu KURATA ,  Mayumi MIKAMI

发明人： Shunpei YAMAZAKI ,  Hiromichi GODO ,  Hideomi SUZAWA ,  Shinya SASAGAWA ,  Motomu KURATA ,  Mayumi MIKAMI

IPC分类号： H01L29/24

CPC分类号： H01L29/7869

摘要： An object is to provide a semiconductor device including an oxide semiconductor, which maintains favorable characteristics and achieves miniaturization. The semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, and a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, in which the source electrode and the drain electrode each include a first conductive layer, and a second conductive layer having a region which extends in a channel length direction from an end portion of the first conductive layer.

摘要翻译： 本发明的目的是提供一种包含氧化物半导体的半导体器件，其保持有利的特性并实现小型化。 半导体器件包括与氧化物半导体层接触的氧化物半导体层，源极和漏电极，与氧化物半导体层重叠的栅电极，以及设置在氧化物半导体层和栅电极之间的栅极绝缘层， 其中源电极和漏极各自包括第一导电层，以及具有从第一导电层的端部在沟道长度方向上延伸的区域的第二导电层。

公开(公告)号：US20110193080A1

公开(公告)日：2011-08-11

申请号：US13014081

申请日：2011-01-26

申请人： Shunpei YAMAZAKI ,  Hiromichi GODO ,  Hideomi SUZAWA ,  Shinya SASAGAWA ,  Motomu KURATA ,  Mayumi MIKAMI

发明人： Shunpei YAMAZAKI ,  Hiromichi GODO ,  Hideomi SUZAWA ,  Shinya SASAGAWA ,  Motomu KURATA ,  Mayumi MIKAMI

IPC分类号： H01L29/78

CPC分类号： H01L29/7869 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  Y10T428/24421

摘要： One object is to provide a semiconductor device that includes an oxide semiconductor and is reduced in size with favorable characteristics maintained. The semiconductor device includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer; and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The source electrode or the drain electrode includes a first conductive layer and a second conductive layer having a region extended in a channel length direction from an end face of the first conductive layer. The sidewall insulating layer has a length of a bottom surface in the channel length direction smaller than a length in the channel length direction of the extended region of the second conductive layer and is provided over the extended region.

摘要翻译： 一个目的是提供一种包括氧化物半导体的半导体器件，并且尺寸减小，并保持良好的特性。 半导体器件包括与氧化物半导体层接触的氧化物半导体层，源电极和漏电极，与氧化物半导体层重叠的栅电极; 以及在氧化物半导体层和栅电极之间的栅极绝缘层。 源电极或漏极包括第一导电层和具有从第一导电层的端面在沟道长度方向上延伸的区域的第二导电层。 侧壁绝缘层的沟道长度方向的底面的长度小于第二导电层的延伸区域的沟道长度方向的长度，并且设置在延伸区域上。

公开(公告)号：US20100187535A1

公开(公告)日：2010-07-29

申请号：US12693037

申请日：2010-01-25

申请人： Hideomi SUZAWA ,  Takafumi MIZOGUCHI ,  Koji DAIRIKI ,  Mayumi MIKAMI ,  Yumiko SAITO

发明人： Hideomi SUZAWA ,  Takafumi MIZOGUCHI ,  Koji DAIRIKI ,  Mayumi MIKAMI ,  Yumiko SAITO

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L27/1288 ,  H01L27/1214

摘要： To provide a method for manufacturing a thin film transistor and a display device using a small number of masks, a thin film transistor is manufactured in such a manner that a first conductive film, an insulating film, a semiconductor film, an impurity semiconductor film, and a second conductive film are stacked; then, a resist mask is formed thereover; first etching is performed to form a thin-film stack body; second etching in which the first conductive film is side-etched is performed by dry-etching to form a gate electrode layer; and a source electrode, a drain electrode, and the like are formed. Before the dry etching, it is preferred that at least a side surface of the etched semiconductor film be oxidized.

摘要翻译： 为了提供制造薄膜晶体管的方法和使用少量掩模的显示装置，制造薄膜晶体管，使得第一导电膜，绝缘膜，半导体膜，杂质半导体膜， 并且第二导电膜被堆叠; 然后在其上形成抗蚀剂掩模; 执行第一蚀刻以形成薄膜堆叠体; 通过干蚀刻进行第一导电膜被侧蚀刻的第二蚀刻，以形成栅电极层; 并且形成源电极，漏电极等。 在干蚀刻之前，优选地，蚀刻的半导体膜的至少一个侧表面被氧化。

公开(公告)号：US20120177842A1

公开(公告)日：2012-07-12

申请号：US13339486

申请日：2011-12-29

申请人： Mayumi MIKAMI ,  Takuya Miwa ,  Kuniharu Nomoto ,  Takeshi Osada

发明人： Mayumi MIKAMI ,  Takuya Miwa ,  Kuniharu Nomoto ,  Takeshi Osada

IPC分类号： B05D5/12

CPC分类号： H01M4/1397 ,  H01M4/36 ,  H01M4/366 ,  H01M4/58 ,  H01M4/5825 ,  Y02E60/122 ,  Y02P70/54 ,  Y02T10/7011 ,  Y10T29/49108 ,  Y10T29/49115

摘要： The power extraction efficiency of a nonaqueous electrolyte secondary battery such as a lithium ion battery is improved. A material having magnetic susceptibility anisotropy such as an olivine type oxide including a transition metal element is used for active material particles. The active material particles and an electrolyte solution are mixed to form a slurry. The slurry is applied to a current collector, and then the current collector is left in a magnetic field. Thus, the active material particles are oriented. With the use of active material particles oriented in such a manner, the power extraction efficiency can be improved.

摘要翻译： 提高锂离子电池等非水电解质二次电池的功率提取效率。 使用具有磁化率各向异性的材料，例如包含过渡金属元素的橄榄石型氧化物作为活性物质颗粒。 将活性物质粒子和电解液混合形成浆料。 将浆料施加到集电体上，然后将集电体置于磁场中。 因此，活性物质颗粒被取向。 通过使用以这种方式取向的活性材料颗粒，可以提高功率提取效率。

公开(公告)号：US20110249228A1

公开(公告)日：2011-10-13

申请号：US13075292

申请日：2011-03-30

申请人： Daisuke KUBOTA ,  Akio YAMASHITA ,  Tetsuji ISHITANI ,  Tomohiro TAMURA ,  Mayumi MIKAMI

发明人： Daisuke KUBOTA ,  Akio YAMASHITA ,  Tetsuji ISHITANI ,  Tomohiro TAMURA ,  Mayumi MIKAMI

IPC分类号： G02F1/1343 ,  H01L29/04

CPC分类号： G02F1/1334 ,  G02F1/1343 ,  G02F1/13439 ,  G02F1/139 ,  G02F2001/13793 ,  H01L27/1225

摘要： In a liquid crystal display device in which a liquid crystal layer exhibiting a blue phase is sandwiched between a first substrate and a second substrate, a pixel electrode layer is electrically connected to a drain electrode layer of a transistor and a common electrode layer is electrically connected to a conductive layer formed through the same steps as the drain electrode layer. The pixel electrode layer and the common electrode layer are over an interlayer film and spaced apart from each other. An opening formed in the interlayer film is filled with liquid crystal, and the liquid crystal layer is formed.

摘要翻译： 在其中呈现蓝相的液晶层夹在第一基板和第二基板之间的液晶显示装置中，像素电极层电连接到晶体管的漏电极层，并且公共电极层电连接 涉及通过与漏电极层相同的步骤形成的导电层。 像素电极层和公共电极层在层间膜之上并且彼此间隔开。 在中间膜中形成的开口用液晶填充，形成液晶层。

公开(公告)号：US20120007087A1

公开(公告)日：2012-01-12

申请号：US13238019

申请日：2011-09-21

申请人： Takafumi MIZOGUCHI ,  Mayumi MIKAMI ,  Yumiko SAITO

发明人： Takafumi MIZOGUCHI ,  Mayumi MIKAMI ,  Yumiko SAITO

IPC分类号： H01L33/08

CPC分类号： H01L21/764 ,  H01L27/1288

摘要： A first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, a second conductive film, and a first resist mask are formed; first etching is performed to expose at least a surface of the first conductive film; second etching accompanied by side etching is performed on part of the first conductive film to form a gate electrode layer; a second resist mask is formed; third etching is performed to form a source and drain electrode layers, a source and drain regions, and a semiconductor layer; a second insulating film is formed; an opening portion is formed in the second insulating film to partially expose the source or drain electrode layer; a pixel electrode is selectively formed in the opening portion and over the second insulating film; and a supporting portion formed using the gate electrode layer is formed in a region overlapping with the opening portion.

摘要翻译： 形成第一导电膜，第一绝缘膜，半导体膜，杂质半导体膜，第二导电膜和第一抗蚀剂掩模; 执行第一蚀刻以暴露第一导电膜的至少一个表面; 在第一导电膜的一部分上进行伴随着侧蚀刻的第二蚀刻，以形成栅电极层; 形成第二抗蚀剂掩模; 执行第三蚀刻以形成源极和漏极电极层，源极和漏极区域以及半导体层; 形成第二绝缘膜; 在第二绝缘膜中形成开口部分以部分地暴露源极或漏极电极层; 在开口部分和第二绝缘膜上选择性地形成像素电极; 并且在与开口部重叠的区域中形成使用该栅电极层形成的支撑部。

公开(公告)号：US20120003539A1

公开(公告)日：2012-01-05

申请号：US13170773

申请日：2011-06-28

申请人： Koji NARA ,  Mayumi MIKAMI

发明人： Koji NARA ,  Mayumi MIKAMI

IPC分类号： H01M4/28 ,  B29C39/02 ,  H01M4/525 ,  B29C33/38

CPC分类号： H01M4/5825 ,  B29C33/3878 ,  B29C33/424 ,  B29C2059/023 ,  H01M4/624 ,  H01M4/625 ,  H01M10/052 ,  H01M2004/023 ,  Y02T10/7011

摘要： An object is to form a positive electrode active material having small and highly uniform particles by a simple process. A template is formed by forming holes in the template by a nanoimprinting method, and the template is filled with a gel-like LiFePO4 material, whereby small-sized LiFePO4 particles are formed and are used as the positive electrode active material of a secondary battery. The particle size can be reduced to less than 50 nm. Further, when the LiFePO4 particles are sintered, the template may be burned down. By making the particle size of the positive electrode active material smaller than the conventional one, a positive electrode that lithium is injected into and extracted from easily can be manufactured.

摘要翻译： 目的是通过简单的工艺形成具有小且高度均匀的颗粒的正极活性材料。 通过纳米压印法在模板中形成孔而形成模板，并且模板填充有凝胶状的LiFePO 4材料，由此形成小尺寸的LiFePO 4颗粒并用作二次电池的正极活性材料。 粒度可以降低到小于50nm。 此外，当LiFePO 4颗粒烧结时，模板可能被烧毁。 通过使正极活性物质的粒径小于常规的粒径，可以制造锂从容易地注入并提取的正极。

公开(公告)号：US20100273319A1

公开(公告)日：2010-10-28

申请号：US12767108

申请日：2010-04-26

申请人： Mayumi MIKAMI ,  Konami IZUMI

发明人： Mayumi MIKAMI ,  Konami IZUMI

IPC分类号： H01L21/768 ,  H01L21/20

CPC分类号： H01L27/1266 ,  H01L21/76814 ,  H01L25/0657 ,  H01L27/124 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor device includes: forming a first and second layers not firmly adhering to each other over a substrate; forming a first semiconductor element layer and a first insulating layer over the second layer; forming a hole reaching the first layer in the first insulating layer; oxidizing the first layer exposed at a bottom of the hole; forming a wiring electrically connected to the first semiconductor element layer over the first insulating layer and in the hole; and separating the first layer and the substrate from the second layer and the first semiconductor element layer and expose the wiring. Further, another method includes providing an anisotropic conductive adhesive between a second semiconductor element layer separated through a manufacturing process similar to the above and the wiring, whereby the first and second semiconductor element layers are electrically connected through the anisotropic conductive adhesive and the wiring.

摘要翻译： 一种制造半导体器件的方法包括：在衬底上形成彼此不牢固地粘合的第一和第二层; 在所述第二层上形成第一半导体元件层和第一绝缘层; 在所述第一绝缘层中形成到达所述第一层的孔; 氧化暴露在孔底部的第一层; 在所述第一绝缘层和所述孔中形成与所述第一半导体元件层电连接的布线; 以及将所述第一层和所述衬底与所述第二层和所述第一半导体元件层分离并使所述布线露出。 此外，另一方法包括在通过类似于上述制造工艺分离的第二半导体元件层和布线之间提供各向异性导电粘合剂，由此第一和第二半导体元件层通过各向异性导电粘合剂和布线电连接。

公开(公告)号：US20090127081A1

公开(公告)日：2009-05-21

申请号：US12269146

申请日：2008-11-12

申请人： Mayumi MIKAMI ,  Konami Izumi

发明人： Mayumi MIKAMI ,  Konami Izumi

IPC分类号： H01H57/00 ,  H01L21/3105

CPC分类号： H01H59/0009 ,  H01H2059/0072

摘要： An object is that contact between an upper switch electrode and a lower switch electrode is not hindered. The present invention relates to a MEMS switch including a substrate; a structural layer with a beam structure in which at least one end is fixed to the substrate; a lower drive electrode layer and a lower switch electrode layer which are provided below the structural layer and on a surface of the substrate; and an upper drive electrode layer and an upper switch electrode layer which are provided on a surface of the structural layer, which is opposite to the substrate, so as to face the lower drive electrode layer and the lower switch electrode layer, respectively, in which the upper switch electrode layer is larger than the lower switch electrode layer.

摘要翻译： 目的是不妨碍上开关电极和下开关电极之间的接触。 本发明涉及一种包括基板的MEMS开关; 具有梁结构的结构层，其中至少一个端部固定到所述基板; 下部驱动电极层和下部开关电极层，其设置在所述结构层的下方和所述基板的表面上; 以及设置在与基板相对的结构层的表面上的上驱动电极层和上开关电极层，以分别面向下驱动电极层和下开关电极层，其中 上开关电极层大于下开关电极层。