公开(公告)号：US06562736B2

公开(公告)日：2003-05-13

申请号：US09951159

申请日：2001-09-12

申请人： Shusaku Yanagawa ,  Hideo Yamagata ,  Takeyoshi Koumoto

发明人： Shusaku Yanagawa ,  Hideo Yamagata ,  Takeyoshi Koumoto

IPC分类号： H01L21477

CPC分类号： H01L21/268 ,  H01L21/2686 ,  H01L29/66242

摘要： Disclosed herein is a manufacturing method for a semiconductor device, including heat treatment by light irradiation to a substrate having a base semiconductor and a semiconductor layer formed on the base semiconductor, the semiconductor layer being different in kind from the base semiconductor, wherein the temperature of the substrate is once maintained at an intermediate temperature between a starting temperature and an attainable maximum temperature, or the temperature rise rate from the starting temperature to the intermediate temperature is set smaller than that from the intermediate temperature to the attainable maximum temperature. Accordingly, in the lamp annealing after heteroepitaxial growth, the generation of dislocations in the heteroepitaxial layer can be reduced.

公开(公告)号：US20070287268A1

公开(公告)日：2007-12-13

申请号：US11747575

申请日：2007-05-11

申请人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

发明人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

IPC分类号： H01L21/322

CPC分类号： H01L21/02505 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/66242

摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

摘要翻译： 在半导体基板上沉积硅 - 锗混晶层的气相生长方法中，气相生长方法包括将硅原料气体引入反应炉的第一步骤，即将硅 原料气体分压与时间成比例地增加，从而在半导体衬底上沉积硅层的第一半导体层减压，第二步是将硅原料气体和锗原料气体引入反应炉中 可以获得期望的锗浓度，从而在减压下在第一半导体层上沉积硅 - 锗混合晶体层的第二半导体层，并且在减压下将硅原料气体引入反应炉中的第三步骤 从而在第二半导体层上沉积硅层的第三半导体层。 因此，可以获得其中可以提高失配位错的半导体层。

公开(公告)号：US07507642B2

公开(公告)日：2009-03-24

申请号：US11747575

申请日：2007-05-11

申请人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

发明人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

IPC分类号： H01L21/322 ,  H01L21/22 ,  H01L21/38

CPC分类号： H01L21/02505 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/66242

摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

摘要翻译： 在半导体基板上沉积硅 - 锗混晶层的气相生长方法中，气相生长方法包括将硅原料气体引入反应炉的第一步骤，即将硅 原料气体分压与时间成比例地增加，从而在半导体衬底上沉积硅层的第一半导体层减压，第二步是将硅原料气体和锗原料气体引入反应炉中 可以获得期望的锗浓度，从而在减压下在第一半导体层上沉积硅 - 锗混合晶体层的第二半导体层，并且在减压下将硅原料气体引入反应炉中的第三步骤 从而在第二半导体层上沉积硅层的第三半导体层。 因此，可以获得其中可以提高失配位错的半导体层。

公开(公告)号：US07060582B2

公开(公告)日：2006-06-13

申请号：US10480061

申请日：2002-06-04

申请人： Takeyoshi Koumoto ,  Hideo Yamagata

发明人： Takeyoshi Koumoto ,  Hideo Yamagata

IPC分类号： H01L21/331

CPC分类号： H01L29/66242 ,  H01L29/7378 ,  Y10S438/933 ,  Y10S438/938

摘要： The present invention relates to a semiconductor layer applicable to a hetero-junction bipolar transistor, a forming method thereof, and a semiconductor device and a manufacturing method thereof, for example. The semiconductor layer and the forming method thereof according to the present invention includes a first SiGe film or SiGeC film containing Ge of which the concentration become equal to a thermal expansion coefficient of silicon oxide and a second SiGe film or SiGeC film formed on the first film. In a semiconductor device according to the present invention and a manufacturing method thereof, first and second layers are laminated on an oxide film having an opening, and the first layer has the substantially same thermal expansion coefficient as that of the oxide film and has a thermal expansion coefficient different from that of the second layer. Thus, a stress that is caused by a difference between the thermal expansion coefficients becomes difficult to occur in the laminated film, and hence the occurrence of misfit dislocation can be suppressed. Thus, the present invention is suitable as the application to a hetero-junction bipolar transistor.

摘要翻译： 本发明涉及例如可应用于异质结双极晶体管的半导体层及其形成方法以及半导体器件及其制造方法。 根据本发明的半导体层及其形成方法包括含有Ge的第一SiGe膜或SiGeC膜，其浓度变得等于氧化硅的热膨胀系数，以及形成在第一膜上的第二SiGe膜或SiGeC膜 。 在根据本发明的半导体器件及其制造方法中，第一层和第二层层叠在具有开口的氧化物膜上，并且第一层具有与氧化膜大致相同的热膨胀系数，并且具有热 膨胀系数与第二层不同。 因此，难以在层压膜中产生由热膨胀系数之差引起的应力，因此能够抑制失配位错的发生。 因此，本发明适用于异质结双极晶体管。

公开(公告)号：US07303979B2

公开(公告)日：2007-12-04

申请号：US10818821

申请日：2004-04-06

申请人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

发明人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

IPC分类号： H01L21/322

CPC分类号： H01L21/02505 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/66242

摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

摘要翻译： 在半导体基板上沉积硅 - 锗混晶层的气相生长方法中，气相生长方法包括将硅原料气体引入反应炉的第一步骤，即将硅 原料气体分压与时间成比例地增加，从而在半导体衬底上沉积硅层的第一半导体层减压，第二步是将硅原料气体和锗原料气体引入反应炉中 可以获得期望的锗浓度，从而在减压下在第一半导体层上沉积硅 - 锗混合晶体层的第二半导体层，并且在减压下将硅原料气体引入反应炉中的第三步骤 从而在第二半导体层上沉积硅层的第三半导体层。 因此，可以获得其中可以提高失配位错的半导体层。

公开(公告)号：US07157344B2

公开(公告)日：2007-01-02

申请号：US10204386

申请日：2001-12-20

申请人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

发明人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

IPC分类号： H01L21/331

CPC分类号： H01L21/02505 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/66242

摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

公开(公告)号：US20060163625A1

公开(公告)日：2006-07-27

申请号：US11341578

申请日：2006-01-26

申请人： Takeyoshi Koumoto ,  Hideo Yamagata

发明人： Takeyoshi Koumoto ,  Hideo Yamagata

IPC分类号： H01L29/76 ,  H01L21/331

CPC分类号： H01L29/66242 ,  H01L29/7378 ,  Y10S438/933 ,  Y10S438/938

摘要： The present invention relates to a semiconductor layer applicable to a hetero-junction bipolar transistor, a forming method thereof, and a semiconductor device and a manufacturing method thereof, for example. The semiconductor layer and the forming method thereof according to the present invention includes a first SiGe film or SiGeC film containing Ge of which the concentration become equal to a thermal expansion coefficient of silicon oxide and a second SiGe film or SiGeC film formed on the first film. In a semiconductor device according to the present invention and a manufacturing method thereof, first and second layers are laminated on an oxide film having an opening, and the first layer has the substantially same thermal expansion coefficient as that of the oxide film and has a thermal expansion coefficient different from that of the second layer. Thus, a stress that is caused by a difference between the thermal expansion coefficients becomes difficult to occur in the laminated film, and hence the occurrence of misfit dislocation can be suppressed. Thus, the present invention is suitable as the application to a hetero-junction bipolar transistor.

摘要翻译： 本发明涉及例如可应用于异质结双极晶体管的半导体层及其形成方法以及半导体器件及其制造方法。 根据本发明的半导体层及其形成方法包括含有Ge的第一SiGe膜或SiGeC膜，其浓度变得等于氧化硅的热膨胀系数，以及形成在第一膜上的第二SiGe膜或SiGeC膜 。 在根据本发明的半导体器件及其制造方法中，第一层和第二层层叠在具有开口的氧化物膜上，并且第一层具有与氧化膜大致相同的热膨胀系数，并且具有热 膨胀系数与第二层不同。 因此，难以在层压膜中产生由热膨胀系数之差引起的应力，因此能够抑制失配位错的发生。 因此，本发明适用于异质结双极晶体管。