公开(公告)号：US07507642B2

公开(公告)日：2009-03-24

申请号：US11747575

申请日：2007-05-11

申请人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

发明人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

IPC分类号： H01L21/322 ,  H01L21/22 ,  H01L21/38

CPC分类号： H01L21/02505 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/66242

摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

摘要翻译： 在半导体基板上沉积硅 - 锗混晶层的气相生长方法中，气相生长方法包括将硅原料气体引入反应炉的第一步骤，即将硅 原料气体分压与时间成比例地增加，从而在半导体衬底上沉积硅层的第一半导体层减压，第二步是将硅原料气体和锗原料气体引入反应炉中 可以获得期望的锗浓度，从而在减压下在第一半导体层上沉积硅 - 锗混合晶体层的第二半导体层，并且在减压下将硅原料气体引入反应炉中的第三步骤 从而在第二半导体层上沉积硅层的第三半导体层。 因此，可以获得其中可以提高失配位错的半导体层。

公开(公告)号：US20070287268A1

公开(公告)日：2007-12-13

申请号：US11747575

申请日：2007-05-11

申请人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

发明人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

IPC分类号： H01L21/322

CPC分类号： H01L21/02505 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/66242

摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

摘要翻译： 在半导体基板上沉积硅 - 锗混晶层的气相生长方法中，气相生长方法包括将硅原料气体引入反应炉的第一步骤，即将硅 原料气体分压与时间成比例地增加，从而在半导体衬底上沉积硅层的第一半导体层减压，第二步是将硅原料气体和锗原料气体引入反应炉中 可以获得期望的锗浓度，从而在减压下在第一半导体层上沉积硅 - 锗混合晶体层的第二半导体层，并且在减压下将硅原料气体引入反应炉中的第三步骤 从而在第二半导体层上沉积硅层的第三半导体层。 因此，可以获得其中可以提高失配位错的半导体层。

公开(公告)号：US07303979B2

公开(公告)日：2007-12-04

申请号：US10818821

申请日：2004-04-06

申请人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

发明人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

IPC分类号： H01L21/322

CPC分类号： H01L21/02505 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/66242

摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

摘要翻译： 在半导体基板上沉积硅 - 锗混晶层的气相生长方法中，气相生长方法包括将硅原料气体引入反应炉的第一步骤，即将硅 原料气体分压与时间成比例地增加，从而在半导体衬底上沉积硅层的第一半导体层减压，第二步是将硅原料气体和锗原料气体引入反应炉中 可以获得期望的锗浓度，从而在减压下在第一半导体层上沉积硅 - 锗混合晶体层的第二半导体层，并且在减压下将硅原料气体引入反应炉中的第三步骤 从而在第二半导体层上沉积硅层的第三半导体层。 因此，可以获得其中可以提高失配位错的半导体层。

公开(公告)号：US07157344B2

公开(公告)日：2007-01-02

申请号：US10204386

申请日：2001-12-20

申请人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

发明人： Hideo Yamagata ,  Takeyoshi Koumoto ,  Kenji Atsuumi ,  Yoichi Negoro ,  Tatsushiro Hirata ,  Takashi Noguchi

IPC分类号： H01L21/331

CPC分类号： H01L21/02505 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02502 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/66242

摘要： In a vapor-phase growth method in which a silicon-germanium mixed crystal layer is deposited on a semiconductor substrate, the vapor-phase growth method comprises a first step of introducing silicon raw material gas into a reaction furnace in such a manner that a silicon raw material gas partial pressure increases in proportion to a time to thereby deposit a first semiconductor layer of a silicon layer on the semiconductor substrate under reduced pressure, a second step of introducing silicon raw material gas and germanium raw material gas into the reaction furnace in such a manner that a desired germanium concentration may be obtained to thereby deposit a second semiconductor layer of a silicon-germanium mixed crystal layer on the first semiconductor layer under reduced pressure and a third step of introducing silicon raw material gas into the reaction furnace under reduced pressure to thereby deposit a third semiconductor layer of a silicon layer on the second semiconductor layer. Thus, there can be obtained a semiconductor layer in which a misfit dislocation can be improved.

公开(公告)号：US06284552B1

公开(公告)日：2001-09-04

申请号：US09190461

申请日：1998-11-13

申请人： Hideo Yamagata ,  Takashi Noguchi ,  Satoshi Hashidume

发明人： Hideo Yamagata ,  Takashi Noguchi ,  Satoshi Hashidume

IPC分类号： H01L2166

CPC分类号： G01N21/33 ,  H01L22/12 ,  Y10S438/964

摘要： Correlation formulae having predetermined forms (i.e., straight lines representing relationships between the surface roughness of the reflectance) are determined in advance between measurement values of the ultraviolet reflectance of the surfaces of respective sample epitaxial growth layers obtained by using an ultraviolet spectrophotometer at a wavelength of 200 nm and measured values of the surface roughness of the same samples by using an atomic force microscope. The surface roughness of an ensuing measurement object is determined by measuring only its ultraviolet reflectance and substituting a resulting measurement value into the correlation formulae.

摘要翻译： 具有预定形式的相关公式（即，表示反射率的表面粗糙度之间的关系的直线）预先在通过使用紫外分光光度计获得的各个样品外延生长层的表面的紫外反射率的测量值之间确定波长 通过使用原子力显微镜测量相同样品的表面粗糙度的测量值。 通过仅测量其紫外反射率并将所得到的测量值代入相关公式来确定随后的测量对象的表面粗糙度。

公开(公告)号：US09377478B2

公开(公告)日：2016-06-28

申请号：US13322773

申请日：2010-04-28

申请人： Takashi Noguchi ,  Yoshiyuki Tajima ,  Koji Kamoshida ,  Naomi Ishii

发明人： Takashi Noguchi ,  Yoshiyuki Tajima ,  Koji Kamoshida ,  Naomi Ishii

IPC分类号： G06F15/173 ,  G01N35/02 ,  G01N35/00

CPC分类号： G01N35/02 ,  G01N35/00 ,  G01N35/00732 ,  G01N35/0092 ,  G01N35/0095

摘要： There is provided a sample test system which can execute a prior process for a specific sample in consideration of priorities and process progresses of a plurality of samples processed in the sample test system. The sample test system includes a sample-test-device management server 101, when a specific-sample prior process request containing a specific sample ID and a prior-process-request level identification code is accepted from a sample access system 108, which selects a specific-sample prior-process-policy determination table based on the prior-process-request level identification code attached to the specific-sample prior process request, which determines a specific-sample prior process policy based on the specific-sample prior-process-policy determination table and a process state of the sample, which specifies a sample ID regarding the specific sample ID, and which transmits the specific-sample prior process policy to a sample-test-device group 119.

摘要翻译： 提供了一种样本测试系统，其可以考虑到在样本测试系统中处理的多个样本的优先级和处理进程，对特定样本执行先前的过程。 样本测试系统包括样本测试设备管理服务器101，当从样本访问系统108接收到包含特定样本ID和先前处理请求级别识别码的特定样本先验处理请求时，该样本测试设备管理服务器101选择 基于与特定样本先验过程请求相关联的先前过程请求级别标识代码的特定样本先前过程策略确定表，其基于特定样本先前处理过程策略确定特定样本先验过程策略， 策略确定表和样本的处理状态，其指定关于特定样本ID的样本ID，并将特定样本先验处理策略发送到样本测试装置组119。

公开(公告)号：US09194876B2

公开(公告)日：2015-11-24

申请号：US12729787

申请日：2010-03-23

申请人： Tatsuya Tokunga ,  Naomi Ishii ,  Takashi Noguchi ,  Masaki Takano ,  Yayoi Shitara

发明人： Tatsuya Tokunga ,  Naomi Ishii ,  Takashi Noguchi ,  Masaki Takano ,  Yayoi Shitara

IPC分类号： G01N1/28 ,  G01N1/02 ,  G01P15/16 ,  G01F3/00 ,  G01N35/00

CPC分类号： G01N35/0092 ,  G01N35/0095 ,  G01N35/02 ,  G01N2035/00881 ,  G01N2035/0091 ,  G01N2035/0094 ,  G01N2035/0406 ,  G06F19/00 ,  G16H10/00 ,  Y02A90/22 ,  Y02A90/26

摘要： A management server of a sample inspection system includes sample processing information generated on the basis of inspection request data, facility data, a simulation execution portion and a window generation portion for generating a monitor window. The inspection request data contains a priority, an order time, a required time and inspection items and the sample processing information contains an inspection start time and an inspection estimate finish time. The monitor window has a work area in which the samples represented by sample bars parallel to the abscissa are arranged in a vertical direction and a past record and a future schedule are allocated to this abscissa with the present time as the base. The sample bars display a simulation execution portion for executing simulation on the basis of the inspection start time, the inspection estimate finish time and a delay time. The management server displays the simulation result.

摘要翻译： 样本检查系统的管理服务器包括基于检查请求数据生成的样本处理信息，设施数据，模拟执行部分和用于生成监视器窗口的窗口生成部分。 检查请求数据包含优先权，订单时间，所需时间和检查项目，并且样本处理信息包含检查开始时间和检查估计完成时间。 监视器窗口具有工作区域，其中与横坐标平行的样本条表示的样本在垂直方向上排列，并且将过去记录和未来调度以当前时间作为基准分配给该横坐标。 样品条显示用于基于检查开始时间，检查估计完成时间和延迟时间来执行模拟的模拟执行部分。 管理服务器显示仿真结果。

公开(公告)号：US08723181B2

公开(公告)日：2014-05-13

申请号：US12662272

申请日：2010-04-08

申请人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Kyung-bae Park

发明人： Huaxiang Yin ,  Takashi Noguchi ,  Wenxu Xianyu ,  Kyung-bae Park

IPC分类号： H01L29/10

CPC分类号： H01L21/02675 ,  H01L21/2026 ,  H01L21/84 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/12 ,  H01L27/1281

摘要： Stacked transistors and electronic devices including the stacked transistors. An electronic device includes a substrate, a first transistor on the substrate and including a first active layer, a first gate, and a first gate insulating layer between the first active layer and the first gate, a first metal line spaced apart from the first gate on the substrate, a first insulating layer covering the first transistor and the first metal line, and a second transistor on the first insulating layer between the first transistor and the first metal line, and including a second active layer, a second gate, and a second gate insulating layer between the second active layer and the second gate.

摘要翻译： 堆叠晶体管和包括堆叠晶体管的电子器件。 电子器件包括衬底，衬底上的第一晶体管，并且在第一有源层和第一栅极之间包括第一有源层，第一栅极和第一栅极绝缘层，与第一栅极间隔开的第一金属线 在所述基板上，覆盖所述第一晶体管和所述第一金属线的第一绝缘层，以及在所述第一晶体管和所述第一金属线之间的所述第一绝缘层上的第二晶体管，并且包括第二有源层，第二栅极和 第二栅极绝缘层，位于第二有源层和第二栅极之间。

公开(公告)号：US20120286668A1

公开(公告)日：2012-11-15

申请号：US13518894

申请日：2010-12-13

申请人： Kazuyoshi Kondo ,  Ryosuke Matsui ,  Terutaka Muramatsu ,  Takashi Noguchi ,  Ryo Suzuki

发明人： Kazuyoshi Kondo ,  Ryosuke Matsui ,  Terutaka Muramatsu ,  Takashi Noguchi ,  Ryo Suzuki

IPC分类号： H05B37/00

CPC分类号： H05B33/089 ,  F21K9/27 ,  F21Y2103/10 ,  F21Y2115/10 ,  Y02B20/341 ,  Y02B20/386

摘要： The object of the present invention is to provide a LED illumination system which does not cause heat generation and damage, even when a straight-tube fluorescent lamp is mistakenly fitted into a straight-tube fluorescent lamp luminaire in which the fluorescent lamp ballast has been replaced with a LED lighting device.The LED illumination system according to the present invention is configurated in such a manner that the LED lighting device is installed in an existing straight-tube fluorescent lamp luminaire, and the LED lamp is connected to the existing sockets. The characteristic of the output from the LED lighting device connected to either inter-terminal section A on the ends of the LED lamp is to be different from that of an existing fluorescent lamp lighting device. The LED lamp is provided with lighting device output detection means for detecting the output from the LED lighting device and also with protection means for cutting off the input to the LED lamp when the output detected by the lighting device output detection means is outside of a predetermined range.

摘要翻译： 本发明的目的是提供一种即使当直管式荧光灯被错误地装配到已经更换了荧光灯镇流器的直管式荧光灯灯具中时也不引起发热和损坏的LED照明系统 配有LED照明装置。 根据本发明的LED照明系统被配置为使得LED照明装置安装在现有的直管荧光灯灯具中，并且LED灯连接到现有的插座。 连接到LED灯两端的端子间部分A的LED照明装置的输出的特性与现有荧光灯照明装置的输出特性不同。 LED灯具有用于检测来自LED照明装置的输出的照明装置输出检测装置，并且还具有用于当由照明装置输出检测装置检测到的输出超出预定值时切断对LED灯的输入的保护装置 范围。

公开(公告)号：US20120075844A1

公开(公告)日：2012-03-29

申请号：US13375788

申请日：2010-06-03

申请人： Kazuya Imagi ,  Takashi Noguchi

发明人： Kazuya Imagi ,  Takashi Noguchi

IPC分类号： F21L4/00

CPC分类号： A47G23/0309 ,  F21V33/0036 ,  F21Y2115/10

摘要： An LED coaster may include: a light transmitting cover, on the upper surface of which an object is placed; a bottom cover attached to the lower surface of the light transmitting cover; a substrate provided between the light transmitting cover and the bottom cover, having an LED mounted on a component surface on the light transmitting cover side and having a switch that turns the LED on and off mounted on a solder surface on the bottom cover side; batteries contained in a battery storage part of the bottom cover to supply electric power to the LED; two rubber pads attached to the bottom surface of the bottom cover; and a switch pad that is attached to the inside of the bottom cover in a vertically moveable manner and on which a switch pressing part facing the switch is arranged. The two rubber pads and the switch pad may be arranged near the outer periphery of the bottom of the bottom cover at approximately equal intervals in a circumferential direction, and the diameter of the switch pad may be set to just under ½ of the diameter of the LED coaster.

摘要翻译： LED过山车可以包括：透光罩，其上表面放置有物体; 底盖附接到透光罩的下表面; 设置在所述透光罩和所述底盖之间的基板，具有安装在所述透光罩侧的部件表面上的LED，并且具有使安装在所述底盖侧的焊料表面上的LED接通和断开的开关; 包含在底盖的电池存储部分中的电池以向LED提供电力; 两个橡胶垫连接到底盖底面; 以及以垂直移动的方式安装在底盖的内部并且布置有面向开关的开关按压部的开关垫。 两个橡胶垫和开关垫可以沿圆周方向以大致相等的间隔设置在底盖的底部的外周附近，并且开关垫的直径可以设定在直径的1/2以下 LED过山车。