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公开(公告)号：US11789648B2
公开(公告)日：2023-10-17
申请号：US17169139
申请日：2021-02-05
Applicant: Silicon Motion, Inc.
Inventor： Po-Wei Wu
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0679 , G06F13/1668 , G11C16/20
Abstract: The invention introduces a method for configuring a reliable command, performed by a flash controller, including: issuing a read ID command to a flash module; and parsing an opcode of a reliable command from reserved bytes in reply data for the read ID command, where the reliable command is used to direct the flash module for access to data in a single level cell (SLC) mode.
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公开(公告)号：US11561732B2
公开(公告)日：2023-01-24
申请号：US17169032
申请日：2021-02-05
Applicant: Silicon Motion, Inc.
Inventor： Po-Wei Wu
Abstract: The invention introduces a method for configuring a reliable command, performed by a flash controller, including: issuing an enabling signal to an output device, where the flash controller and the output device are disposed on a printed circuit board (PCB) and intercoupled through wires in the PCB; reading an opcode of the reliable command corresponding to a flash module from the output device, where the flash module is disposed on the PCB and coupled to the flash controller through circuits in the PCB, and the reliable command is used to direct the flash module for access to data in a single level cell (SLC) mode; and stopping issuing the enabling signal to the output device after obtaining the opcode of the reliable command.
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公开(公告)号：US11537328B2
公开(公告)日：2022-12-27
申请号：US17380402
申请日：2021-07-20
Applicant: Silicon Motion, Inc.
Inventor： Po-Wei Wu
IPC: G06F3/06
Abstract: An apparatus and a method for executing host commands, which is performed by a host interface in a flash controller, to include: determining whether a preset number of successive unaligned host long-write commands have been detected, where a first starting logical block address (LBA) number of data to be written, which is requested by each unaligned host long-write command, does not align with a first physical page of one super page; if so, calculating an offset, so that a second starting LBA number of data to be written, which is requested by a host write command, plus the offset aligns with a first physical page of one super page; generating a third starting LBA number by adding the offset to the second starting LBA number; and storing an entry in an LBA shifting table, which includes information about the second starting LBA number and the offset.
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公开(公告)号：US20200210202A1
公开(公告)日：2020-07-02
申请号：US16721887
申请日：2019-12-19
Applicant: Silicon Motion, Inc.
Inventor： Po-Wei Wu
IPC: G06F9/4401 , G11C29/38
Abstract: An access device includes a memory controller coupled to a memory device and configured to access the memory device. The memory controller is further configured to perform a test procedure on the memory device to obtain a test result, write a boot code index, which indicates a predetermined address for storing predetermined system data of the memory device and a copy rule adopted for generating one or more duplicates of the predetermined system data, in the memory device, establish system data of the memory device according to the test result, write the system data into the predetermined address as the predetermined system data, and write the system data in one or more memory blocks of the memory device as the duplicates of the predetermined system data according to the copy rule.
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公开(公告)号：US12038811B2
公开(公告)日：2024-07-16
申请号：US18072725
申请日：2022-12-01
Applicant: Silicon Motion, Inc.
Inventor： Po-Wei Wu
CPC classification number: G06F11/1088 , G06F3/0619 , G06F3/0629 , G06F3/0679 , G06F11/10 , G06F11/1004 , G06F11/1048
Abstract: A memory controller includes an error correction code engine, a buffer memory and a microprocessor. In response to a first decoding result of predetermined data, the microprocessor performs a repeated read operation on a memory device to obtain multiple read results of a data chunk having the predetermined data. The data chunk includes multiple bits. The microprocessor further performs a data reconstruction and error correction procedure according to the read results of the data chunk. In an operation of data reconstruction, the microprocessor determines a bit value corresponding to each bit in the data chunk according to the read results of the data chunk to generate a reconstructed data chunk. In an operation of error correction, the microprocessor provides the reconstructed data chunk to the error correction code engine to obtain a second decoding result of the predetermined data.
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Patent Agency Ranking
公开(公告)号：US10811120B2
公开(公告)日：2020-10-20
申请号：US16141983
申请日：2018-09-26
Applicant: Silicon Motion Inc.
Inventor： Po-Wei Wu
Abstract: A method for performing page availability management of a memory device, the associated memory device and electronic device, and page availability management system are provided. The method may include: obtaining a set of page Error Correction Code (ECC) error tables of a non-volatile (NV) memory; based on a predetermined rule, finding respective local risky pages of at least one portion of blocks within a plurality of blocks according to the set of page ECC error tables, respectively, to generate local risky page counts respectively corresponding to page indexes; finding one or more global risky pages corresponding to one or more page indexes of the multiple page indexes according to the local risky page counts; and writing a global risky page table into the memory device, for controlling the memory device to skip using the one or more global risky pages of each of the plurality of blocks.
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公开(公告)号：US20230185667A1
公开(公告)日：2023-06-15
申请号：US18072725
申请日：2022-12-01
Applicant: Silicon Motion, Inc.
Inventor： Po-Wei Wu
CPC classification number: G06F11/1088 , G06F3/0619 , G06F3/0679 , G06F3/0629
Abstract: A memory controller includes an error correction code engine, a buffer memory and a microprocessor. In response to a first decoding result of predetermined data, the microprocessor performs a repeated read operation on a memory device to obtain multiple read results of a data chunk having the predetermined data. The data chunk includes multiple bits. The microprocessor further performs a data reconstruction and error correction procedure according to the read results of the data chunk. In an operation of data reconstruction, the microprocessor determines a bit value corresponding to each bit in the data chunk according to the read results of the data chunk to generate a reconstructed data chunk. In an operation of error correction, the microprocessor provides the reconstructed data chunk to the error correction code engine to obtain a second decoding result of the predetermined data.
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公开(公告)号：US11327770B2
公开(公告)日：2022-05-10
申请号：US16721887
申请日：2019-12-19
Applicant: Silicon Motion, Inc.
Inventor： Po-Wei Wu
IPC: G06F9/4401 , G11C29/38
Abstract: An access device includes a memory controller coupled to a memory device and configured to access the memory device. The memory controller is further configured to perform a test procedure on the memory device to obtain a test result, write a boot code index, which indicates a predetermined address for storing predetermined system data of the memory device and a copy rule adopted for generating one or more duplicates of the predetermined system data, in the memory device, establish system data of the memory device according to the test result, write the system data into the predetermined address as the predetermined system data, and write the system data in one or more memory blocks of the memory device as the duplicates of the predetermined system data according to the copy rule.
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公开(公告)号：US11062746B1
公开(公告)日：2021-07-13
申请号：US17085640
申请日：2020-10-30
Applicant: Silicon Motion, Inc.
Inventor： Po-Wei Wu
Abstract: The invention introduces a non-transitory computer program product for activating a flash device when executed by a processing unit of the flash device to have program code to: determine whether the flash device is physically reset when the flash device enters a test mode perform an operation of a first phase for transmitting a very first message to a card-initialization host when the flash device is physically reset; and perform an operation of a second phase for searching a flash module for information referenced by In-System Programming (ISP) code, obtaining the ISP code from a designated address, and programming the ISP code into the flash module when the flash device is not physically reset.
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公开(公告)号：US20190294354A1
公开(公告)日：2019-09-26
申请号：US16352829
申请日：2019-03-14
Applicant: Silicon Motion Inc.
Inventor： Po-Wei Wu
IPC: G06F3/06 , G06F9/4401 , G06F9/445
Abstract: A method for performing initialization in a memory device, the associated memory device and the controller thereof, and an associated electronic device are provided. The method may include: after a non-volatile (NV) memory within the memory device is powered on, searching for an empty memory indicator in the NV memory, wherein the empty memory indicator is applicable to determining whether the NV memory is empty; and according to whether the empty memory indicator is found or not, selectively skipping or performing a program code search in the NV memory, to complete an initialization process, wherein the initialization process includes at least one initial setting of the memory device, and if the empty memory indicator is found, the program code search is skipped, otherwise, the program code search is performed.
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