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公开(公告)号：US20160351268A1
公开(公告)日：2016-12-01
申请号：US15135445
申请日：2016-04-21
Applicant: Silicon Storage Technology, Inc.
Inventor： Hieu Van Tran , Anh Ly , Thuan Vu , Hung Quoc Nguyen , Viet Tan Nguyen
CPC classification number: G11C16/30 , G11C5/14 , G11C8/10 , G11C16/08 , G11C16/10 , G11C16/28 , G11C16/32 , G11C29/14 , G11C2207/2227
Abstract: A circuit and method are disclosed for operating a non-volatile memory device, comprising time sampling a reference current or voltage in a floating holding node to obtain a hold voltage and applying the hold voltage in sensing circuitry.
Abstract translation: 公开了一种用于操作非易失性存储器件的电路和方法，包括对浮动保持节点中的参考电流或电压进行时间采样以获得保持电压并将保持电压施加在感测电路中。
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公开(公告)号：US10141062B2
公开(公告)日：2018-11-27
申请号：US15135445
申请日：2016-04-21
Applicant: Silicon Storage Technology, Inc.
Inventor： Hieu Van Tran , Anh Ly , Thuan Vu , Hung Quoc Nguyen , Viet Tan Nguyen
IPC: G11C11/34 , G11C7/02 , G11C16/30 , G11C16/08 , G11C16/10 , G11C16/28 , G11C8/10 , G11C5/14 , G11C16/32 , G11C29/14
Abstract: A circuit and method are disclosed for operating a non-volatile memory device, comprising time sampling a reference current or voltage in a floating holding node to obtain a hold voltage and applying the hold voltage in sensing circuitry.
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公开(公告)号：US20160351267A1
公开(公告)日：2016-12-01
申请号：US14726124
申请日：2015-05-29
Applicant: Silicon Storage Technology, Inc.
Inventor： Hieu Van Tran , Anh Ly , Thuan Vu , Hung Quoc Nguyen , Viet Tan Nguyen
CPC classification number: G11C16/30 , G11C5/14 , G11C8/10 , G11C16/08 , G11C16/10 , G11C16/28 , G11C16/32 , G11C29/14 , G11C2207/2227
Abstract: The present invention relates to a circuit and method for low power operation in a flash memory system. In disclosed embodiments of a selection-decoding circuit path, pull-up and pull-down circuits are used to save values at certain output nodes during a power save or shut down modes, which allows the main power source to be shut down while still maintaining the values.
Abstract translation: 本发明涉及一种用于闪存系统中的低功率操作的电路和方法。 在选择解码电路路径的所公开的实施例中，上拉和下拉电路用于在节电或关断模式期间在某些输出节点处保存值，这允许主电源在仍然保持时被关闭 价值。
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公开(公告)号：US09672930B2
公开(公告)日：2017-06-06
申请号：US14726124
申请日：2015-05-29
Applicant: Silicon Storage Technology, Inc.
Inventor： Hieu Van Tran , Anh Ly , Thuan Vu , Hung Quoc Nguyen , Viet Tan Nguyen
IPC: G11C7/00 , G11C16/30 , G11C16/08 , G11C16/10 , G11C16/28 , G11C8/10 , G11C5/14 , G11C16/32 , G11C29/14
CPC classification number: G11C16/30 , G11C5/14 , G11C8/10 , G11C16/08 , G11C16/10 , G11C16/28 , G11C16/32 , G11C29/14 , G11C2207/2227
Abstract: The present invention relates to a circuit and method for low power operation in a flash memory system. In disclosed embodiments of a selection-decoding circuit path, pull-up and pull-down circuits are used to save values at certain output nodes during a power save or shut down modes, which allows the main power source to be shut down while still maintaining the values.
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