公开(公告)号：US12159821B2

公开(公告)日：2024-12-03

申请号：US17748920

申请日：2022-05-19

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Ting-Yang Chou ,  Yih-Jenn Jiang ,  Don-Son Jiang

IPC: H01L23/498 ,  H01L21/48 ,  H01L25/10 ,  H01L23/552 ,  H01L25/04 ,  H01L25/11

Abstract: An electronic package is provided, and the manufacturing method of which is to form a plurality of conductive pillars and dispose an electronic element on a first circuit structure, then cover the plurality of conductive pillars and the electronic element with a cladding layer, and then form a second circuit structure on the cladding layer, so that the plurality of conductive pillars are electrically connected to the first circuit structure and the second circuit structure, and the electronic element is electrically connected to the first circuit structure, where a fan-out redistribution layer is configured in the first circuit structure and the second circuit structure, and at least one ground layer is configured in the second circuit structure. Further, the ground layer includes a plurality of sheet bodies arranged in an array, so that at least one slot is disposed between every two adjacent sheet bodies.

公开(公告)号：US20230395571A1

公开(公告)日：2023-12-07

申请号：US18235079

申请日：2023-08-17

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Meng-Huan Chia ,  Yih-Jenn Jiang ,  Chang-Fu Lin ,  Don-Son Jiang

IPC: H01L25/065 ,  H01L25/16 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L25/162 ,  H01L25/50 ,  H01L2225/06548 ,  H01L2225/06589 ,  H01L2225/06572 ,  H01L2225/06517

Abstract: An electronic package is provided, in which a first electronic element and a second electronic element are disposed on a first side of a circuit structure and a second side of the circuit structure, respectively, where a first metal layer is formed between the first side of the circuit structure and the first electronic element, a second metal layer is formed on a surface of the second electronic element, and at least one thermally conductive pillar is disposed on the second side of the circuit structure and extends into the circuit structure to thermally conduct the first metal layer and the second metal layer. Therefore, through the thermally conductive pillar, heat generated during operations of the first electronic element and the second electronic element can be quickly dissipated to an external environment and would not accumulate.

公开(公告)号：US12255182B2

公开(公告)日：2025-03-18

申请号：US18235079

申请日：2023-08-17

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Meng-Huan Chia ,  Yih-Jenn Jiang ,  Chang-Fu Lin ,  Don-Son Jiang

IPC: H01L25/00 ,  H01L25/065 ,  H01L25/16

Abstract: An electronic package is provided, in which a first electronic element and a second electronic element are disposed on a first side of a circuit structure and a second side of the circuit structure, respectively, where a first metal layer is formed between the first side of the circuit structure and the first electronic element, a second metal layer is formed on a surface of the second electronic element, and at least one thermally conductive pillar is disposed on the second side of the circuit structure and extends into the circuit structure to thermally conduct the first metal layer and the second metal layer. Therefore, through the thermally conductive pillar, heat generated during operations of the first electronic element and the second electronic element can be quickly dissipated to an external environment and would not accumulate.

公开(公告)号：US08895367B2

公开(公告)日：2014-11-25

申请号：US13964465

申请日：2013-08-12

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Jung-Pang Huang ,  Hui-Min Huang ,  Kuan-Wei Chuang ,  Chun-Tang Lin ,  Yih-Jenn Jiang

IPC: H01L21/56 ,  H01L23/00 ,  H01L23/36 ,  H01L23/538 ,  H01L23/31

CPC classification number: H01L21/56 ,  H01L21/568 ,  H01L23/3121 ,  H01L23/36 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/014 ,  H01L2924/3511

Abstract: A semiconductor package includes: a chip having an active surface with a plurality of electrode pads and an inactive surface opposite to the active surface; an encapsulant encapsulating the chip and having opposite first and second surfaces, the first surface being flush with the active surface of the chip; and first and second metal layers formed on the second surface of the encapsulant, thereby providing a rigid support to the overall structure to prevent warpage and facilitating heat dissipation of the overall structure.

Abstract translation: 半导体封装包括：具有多个电极焊盘的有源表面和与该有源表面相对的无效表面的芯片; 密封剂，其封装所述芯片并且具有相对的第一和第二表面，所述第一表面与所述芯片的有源表面齐平; 以及形成在密封剂的第二表面上的第一和第二金属层，由此为整个结构提供刚性支撑以防止翘曲并促进整体结构的散热。

公开(公告)号：US11764188B2

公开(公告)日：2023-09-19

申请号：US17411228

申请日：2021-08-25

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Meng-Huan Chia ,  Yih-Jenn Jiang ,  Chang-Fu Lin ,  Don-Son Jiang

IPC: H01L25/065 ,  H01L25/16 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L25/162 ,  H01L25/50 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06572 ,  H01L2225/06589

Abstract: An electronic package is provided, in which a first electronic element and a second electronic element are disposed on a first side of a circuit structure and a second side of the circuit structure, respectively, where a first metal layer is formed between the first side of the circuit structure and the first electronic element, a second metal layer is formed on a surface of the second electronic element, and at least one thermally conductive pillar is disposed on the second side of the circuit structure and extends into the circuit structure to thermally conduct the first metal layer and the second metal layer. Therefore, through the thermally conductive pillar, heat generated during operations of the first electronic element and the second electronic element can be quickly dissipated to an external environment and would not accumulate.

公开(公告)号：US20220189900A1

公开(公告)日：2022-06-16

申请号：US17171764

申请日：2021-02-09

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chia-Yu Kuo ,  Rui-Feng Tai ,  Yih-Jenn Jiang ,  Don-Son Jiang ,  Chang-Fu Lin

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: An electronic package is provided and includes at least one conductor with a relatively large width formed on an electrode pad of an electronic element and in contact with a circuit layer. As such, when the electronic element and the circuit layer deviate in position relative to one another, the circuit layer will be still in contact with the conductor and hence electrically connected to the electronic element.

公开(公告)号：US20220148996A1

公开(公告)日：2022-05-12

申请号：US17135161

申请日：2020-12-28

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Fang-Lin Tsai ,  Chia-Yu Kuo ,  Pei-Geng Weng ,  Wei-Son Tsai ,  Yih-Jenn Jiang

IPC: H01L23/00 ,  H01L23/31

Abstract: An electronic package is provided, where a circuit layer and a metal layer having a plurality of openings are formed on a dielectric layer of a circuit portion to reduce the area ratio of the metal layer to the dielectric layer, so as to reduce stress concentration and prevent warping of the electronic package.

公开(公告)号：US20190214372A1

公开(公告)日：2019-07-11

申请号：US16356589

申请日：2019-03-18

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Hong-Da Chang ,  Yih-Jenn Jiang

IPC: H01L25/065 ,  H01L25/10 ,  H01L23/552 ,  H01L23/00 ,  H01L23/31 ,  H01L21/768 ,  H01L21/683 ,  H01L21/56 ,  H01L25/00

Abstract: An electronic package is provided, including: a first circuit structure; an electronic component and a conductive pillar disposed on the first circuit structure; an encapsulation layer encapsulating the electronic component and the conductive pillar; a second circuit structure disposed on the encapsulation layer; and a shielding layer encapsulating the first circuit structure, a side surface of the encapsulation layer, and a side surface of the second circuit structure. The electronic component is surrounded by the shielding layer, and is protected from electromagnetic interference. A method for fabricating the electronic package is also provided.

公开(公告)号：US20250038088A1

公开(公告)日：2025-01-30

申请号：US18909030

申请日：2024-10-08

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Ting-Yang Chou ,  Yih-Jenn Jiang ,  Don-Son Jiang

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/552 ,  H01L25/04 ,  H01L25/10 ,  H01L25/11

Abstract: An electronic package is provided, and the manufacturing method of which is to form a plurality of conductive pillars and dispose an electronic element on a first circuit structure, then cover the plurality of conductive pillars and the electronic element with a cladding layer, and then form a second circuit structure on the cladding layer, so that the plurality of conductive pillars are electrically connected to the first circuit structure and the second circuit structure, and the electronic element is electrically connected to the first circuit structure, where a fan-out redistribution layer is configured in the first circuit structure and the second circuit structure, and at least one ground layer is configured in the second circuit structure. Further, the ground layer includes a plurality of sheet bodies arranged in an array, so that at least one slot is disposed between every two adjacent sheet bodies.

公开(公告)号：US11791300B2

公开(公告)日：2023-10-17

申请号：US17135161

申请日：2020-12-28

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Fang-Lin Tsai ,  Chia-Yu Kuo ,  Pei-Geng Weng ,  Wei-Son Tsai ,  Yih-Jenn Jiang

IPC: H01L23/31 ,  H01L23/00

CPC classification number: H01L24/20 ,  H01L23/3157 ,  H01L2224/211 ,  H01L2224/2101 ,  H01L2224/214 ,  H01L2224/2105 ,  H01L2924/3511

Abstract: An electronic package is provided, where a circuit layer and a metal layer having a plurality of openings are formed on a dielectric layer of a circuit portion to reduce the area ratio of the metal layer to the dielectric layer, so as to reduce stress concentration and prevent warping of the electronic package.