METHOD FOR FORMING A THREE-DIMENSIONAL STRUCTURE OF METAL-INSULATOR-METAL TYPE
    1.
    发明申请
    METHOD FOR FORMING A THREE-DIMENSIONAL STRUCTURE OF METAL-INSULATOR-METAL TYPE 有权
    形成金属绝缘体金属型三维结构的方法

    公开(公告)号:US20110227194A1

    公开(公告)日:2011-09-22

    申请号:US13052262

    申请日:2011-03-21

    CPC classification number: H01L23/5223 H01L28/60 H01L2924/0002 H01L2924/00

    Abstract: A method for forming a capacitive structure in a metal level of an interconnection stack including a succession of metal levels and of via levels, including the steps of: forming, in the metal level, at least one conductive track in which a trench is defined; conformally forming an insulating layer on the structure; forming, in the trench, a conductive material; and planarizing the structure.

    Abstract translation: 一种用于在包括一系列金属水平和通孔级别的互连堆叠的金属层中形成电容结构的方法,包括以下步骤:在金属层面形成至少一个其中限定沟槽的导电轨道; 在结构上保形地形成绝缘层; 在沟槽中形成导电材料; 并平坦化结构。

    Method for forming a three-dimensional structure of metal-insulator-metal type
    2.
    发明授权
    Method for forming a three-dimensional structure of metal-insulator-metal type 有权
    用于形成金属 - 绝缘体 - 金属型三维结构的方法

    公开(公告)号:US08609530B2

    公开(公告)日:2013-12-17

    申请号:US13052262

    申请日:2011-03-21

    CPC classification number: H01L23/5223 H01L28/60 H01L2924/0002 H01L2924/00

    Abstract: A method for forming a capacitive structure in a metal level of an interconnection stack including a succession of metal levels and of via levels, including the steps of: forming, in the metal level, at least one conductive track in which a trench is defined; conformally forming an insulating layer on the structure; forming, in the trench, a conductive material; and planarizing the structure.

    Abstract translation: 一种用于在包括一系列金属水平和通孔级别的互连堆叠的金属层中形成电容结构的方法,包括以下步骤:在金属层面形成至少一个其中限定沟槽的导电轨道; 在结构上保形地形成绝缘层; 在沟槽中形成导电材料; 并平坦化结构。

    PROCESS FOR FABRICATING AN INTEGRATED CIRCUIT INCLUDING A METAL-INSULATOR-METAL CAPACITOR AND CORRESPONDING INTEGRATED CIRCUIT
    3.
    发明申请
    PROCESS FOR FABRICATING AN INTEGRATED CIRCUIT INCLUDING A METAL-INSULATOR-METAL CAPACITOR AND CORRESPONDING INTEGRATED CIRCUIT 审中-公开
    用于制造包括金属绝缘体 - 金属电容器和相应的集成电路的集成电路的方法

    公开(公告)号:US20110221035A1

    公开(公告)日:2011-09-15

    申请号:US13034373

    申请日:2011-02-24

    CPC classification number: H01L23/5223 H01L2924/0002 H01L2924/00

    Abstract: An integrated circuit is fabricated by producing metallization levels in insulating regions, the insulating region being formed of a first material having a first dielectric constant. At least one metal-insulator-metal capacitor is formed by providing metal electrodes in the metallization level, and locally replacing the first material, which is located between the metal electrodes, with a second material having a second dielectric constant greater than the first dielectric constant.

    Abstract translation: 通过在绝缘区域中产生金属化水平来制造集成电路,绝缘区域由具有第一介电常数的第一材料形成。 通过在金属化水平中提供金属电极并且将位于金属电极之间的第一材料局部替换为具有大于第一介电常数的第二介电常数的第二材料,形成至少一个金属 - 绝缘体 - 金属电容器 。

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