公开(公告)号：US10429436B2

公开(公告)日：2019-10-01

申请号：US15546252

申请日：2016-01-19

Applicant: Soitec

Inventor： Cédric Malaquin ,  Jean-Pierre Raskin ,  Eric Desbonnets

IPC: G01R31/26 ,  G01R31/28 ,  G01R29/08 ,  G01R29/12

Abstract: The disclosure relates to a device for measuring an electrical characteristic of a substrate comprising a support made of a dielectric material having a bearing surface, the support comprising an electrical test structure having a contact surface flush with the bearing surface of the support, the bearing surface of the support and the contact surface of the electrical test structure being suitable for coming into close contact with a substrate. The measurement device also comprises at least one connection bump contact formed on another surface of the support and electrically linked to the electrical test structure. This disclosure also relates to a system for characterizing a substrate and a method for measuring a characteristic of a substrate employing the measurement device.

公开(公告)号：US20180024186A1

公开(公告)日：2018-01-25

申请号：US15546252

申请日：2016-01-19

Applicant: Soitec ,  UNIVERSITE CATHOLIQUE DU LOUVAIN

Inventor： Cédric Malaquin ,  Jean-Pierre Raskin ,  Eric Desbonnets

IPC: G01R31/28 ,  G01R29/12 ,  G01R29/08 ,  G01R31/26

CPC classification number: G01R31/2822 ,  G01R29/0878 ,  G01R29/12 ,  G01R31/2648 ,  G01R31/2831 ,  G01R31/2887 ,  G01R31/2889

Abstract: The disclosure relates to a device for measuring an electrical characteristic of a substrate comprising a support made of a dielectric material having a bearing surface, the support comprising an electrical test structure having a contact surface flush with the bearing surface of the support, the bearing surface of the support and the contact surface of the electrical test structure being suitable for coming into close contact with a substrate. The measurement device also comprises at least one connection bump contact formed on another surface of the support and electrically linked to the electrical test structure. This disclosure also relates to a system for characterizing a substrate and a method for measuring a characteristic of a substrate employing the measurement device.

公开(公告)号：US11923239B2

公开(公告)日：2024-03-05

申请号：US17663898

申请日：2022-05-18

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L21/762 ,  H01L21/02 ,  H01L21/84 ,  H01L27/12 ,  H01L29/06 ,  H01L29/786

CPC classification number: H01L21/76283 ,  H01L21/02002 ,  H01L21/76224 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1218 ,  H01L29/0649 ,  H01L29/78603 ,  H01L21/76264

Abstract: Substrates for microelectronic radiofrequency devices may include a substrate comprising a semiconductor material. Trenches may be located in an upper surface of the substrate, at least some of the trenches including a filler material located within the respective trench. A resistivity of the filler material may be 10 kOhms·cm or greater. A piezoelectric material may be located on or above the upper surface of the substrate. Methods of making substrates for microelectronic radiofrequency devices may involve forming trenches in an upper surface of a substrate including a semiconductor material. A filler material may be placed in at least some of the trenches, and a piezoelectric material may be placed on or above the upper surface of the substrate.

公开(公告)号：US20200169222A1

公开(公告)日：2020-05-28

申请号：US16614732

申请日：2018-05-23

Applicant: Soitec

Inventor： Marcel Broekaart ,  Frederic Allibert ,  Eric Desbonnets ,  Jean-Pierre Raskin ,  Martin Rack

IPC: H03C7/00 ,  H01L23/66

Abstract: A method for minimizing harmonic distortion and/or intermodulation distortion of a radiofrequency signal propagating in a radiofrequency circuit formed on a semiconductor substrate coated with an electrically insulating layer, wherein a curve representing the distortion as a function of a power of the input or output signal exhibits a trough around a given power (PDip), the method comprises applying, between the radiofrequency circuit and the semiconductor substrate, an electrical potential difference (VGB) chosen so as to move the trough toward a given operating power of the radiofrequency circuit.

公开(公告)号：US20220277988A1

公开(公告)日：2022-09-01

申请号：US17663898

申请日：2022-05-18

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786 ,  H01L29/06

Abstract: Substrates for microelectronic radiofrequency devices may include a substrate comprising a semiconductor material. Trenches may be located in an upper surface of the substrate, at least some of the trenches including a filler material located within the respective trench. A resistivity of the filler material may be 10 kOhms·cm or greater. A piezoelectric material may be located on or above the upper surface of the substrate. Methods of making substrates for microelectronic radiofrequency devices may involve forming trenches in an upper surface of a substrate including a semiconductor material. A filler material may be placed in at least some of the trenches, and a piezoelectric material may be placed on or above the upper surface of the substrate.

公开(公告)号：US10819282B2

公开(公告)日：2020-10-27

申请号：US16614732

申请日：2018-05-23

Applicant: Soitec

Inventor： Marcel Broekaart ,  Frederic Allibert ,  Eric Desbonnets ,  Jean-Pierre Raskin ,  Martin Rack

IPC: H01L23/66 ,  H03C7/00

Abstract: A method for minimizing harmonic distortion and/or intermodulation distortion of a radiofrequency signal propagating in a radiofrequency circuit formed on a semiconductor substrate coated with an electrically insulating layer, wherein a curve representing the distortion as a function of a power of the input or output signal exhibits a trough around a given power (PDip), the method comprises applying, between the radiofrequency circuit and the semiconductor substrate, an electrical potential difference (VGB) chosen so as to move the trough toward a given operating power of the radiofrequency circuit.

公开(公告)号：US11367650B2

公开(公告)日：2022-06-21

申请号：US17109978

申请日：2020-12-02

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L27/12 ,  H01L21/762 ,  H01L21/84 ,  H01L21/02 ,  H01L29/786 ,  H01L29/06

Abstract: Substrates for microelectronic radiofrequency devices may include a substrate comprising a semiconductor material. Trenches may be located in an upper surface of the substrate, at least some of the trenches including a filler material located within the respective trench. A resistivity of the filler material may be 10 kOhms·cm or greater. A piezoelectric material may be located on or above the upper surface of the substrate. Methods of making substrates for microelectronic radiofrequency devices may involve forming trenches in an upper surface of a substrate including a semiconductor material. A filler material may be placed in at least some of the trenches, and a piezoelectric material may be placed on or above the upper surface of the substrate.

公开(公告)号：US20210143053A1

公开(公告)日：2021-05-13

申请号：US17109978

申请日：2020-12-02

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786 ,  H01L29/06

Abstract: Substrates for microelectronic radiofrequency devices may include a substrate comprising a semiconductor material. Trenches may be located in an upper surface of the substrate, at least some of the trenches including a filler material located within the respective trench. A resistivity of the filler material may be 10 kOhms·cm or greater. A piezoelectric material may be located on or above the upper surface of the substrate. Methods of making substrates for microelectronic radiofrequency devices may involve forming trenches in an upper surface of a substrate including a semiconductor material. A filler material may be placed in at least some of the trenches, and a piezoelectric material may be placed on or above the upper surface of the substrate.

公开(公告)号：US10943815B2

公开(公告)日：2021-03-09

申请号：US16308602

申请日：2017-06-06

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786 ,  H01L29/06

Abstract: A substrate for microelectronic radiofrequency devices includes a carrier substrate made of a first semiconductor material having a resistivity higher than 500 ohms-cm; a plurality of trenches in the carrier substrate, which trenches are filled with a second material, and defining on a first side of the carrier substrate a plurality of first zones made of a first material and at least one second zone made of a second material. The second material has a resistivity higher than 10 kohms-cm, and the first zones have a maximum dimension smaller than 10 microns and are insulated from one another by the second zone.

公开(公告)号：US20190157137A1

公开(公告)日：2019-05-23

申请号：US16308602

申请日：2017-06-06

Applicant: Soitec

Inventor： Eric Desbonnets ,  Ionut Radu ,  Oleg Kononchuk ,  Jean-Pierre Raskin

IPC: H01L21/762 ,  H01L21/84 ,  H01L27/12 ,  H01L29/06

Abstract: A substrate for microelectronic radiofrequency devices includes a carrier substrate made of a first semiconductor material having a resistivity higher than 500 ohms·cm; a plurality of trenches in the carrier substrate, which trenches are filled with a second material, and defining on a first side of the carrier substrate a plurality of first zones made of a first material and at least one second zone made of a second material. The second material has a resistivity higher than 10 kohms·cm, and the first zones have a maximum dimension smaller than 10 microns and are insulated from one another by the second zone.