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    Semiconductor package and method for its manufacture
    3.
    发明申请
    Semiconductor package and method for its manufacture 有权
    半导体封装及其制造方法

    公开(公告)号：US20060012026A1

    公开(公告)日：2006-01-19

    申请号：US11173853

    申请日：2005-06-30

    申请人： Suk-Chae Kang ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Si-Hoon Lee

    发明人： Suk-Chae Kang ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Si-Hoon Lee

    IPC分类号： H01L23/48

    CPC分类号： H01L23/50 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A semiconductor package includes a metal plate in which one or more openings are formed, the metal plate mounting a semiconductor chip and a printed wire pattern substrate, e.g. a PCB, mounting one or more decoupling capacitors. The semiconductor chip is in direct contact with the metal plate to improve thermal characteristics, and the substrate is supported by the metal plate to increase mechanical stability of the package. The one or more openings in the metal plate accommodate the passing therethrough of plural pins electrically connected via the printed wire pattern substrate to the semiconductor chip. The semiconductor package can be usefully applied to a digital micro-mirror device (DMD) semiconductor package for use in a projection display device.

    摘要翻译： 半导体封装包括其中形成有一个或多个开口的金属板，安装半导体芯片的金属板和印刷的线图案衬底，例如， PCB，安装一个或多个去耦电容器。 半导体芯片与金属板直接接触以改善热特性，并且基板由金属板支撑以增加封装的机械稳定性。 金属板中的一个或多个开口适应通过印刷的线图案基板电连接到半导体芯片的多个引脚的穿过。 半导体封装可以有用地应用于用于投影显示装置的数字微镜器件（DMD）半导体封装。

    Semiconductor package and method for its manufacture
    4.
    发明授权
    Semiconductor package and method for its manufacture 有权
    半导体封装及其制造方法

    公开(公告)号：US07309916B2

    公开(公告)日：2007-12-18

    申请号：US11173853

    申请日：2005-06-30

    申请人： Suk-Chae Kang ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Si-Hoon Lee

    发明人： Suk-Chae Kang ,  Sa-Yoon Kang ,  Dong-Han Kim ,  Si-Hoon Lee

    IPC分类号： H01L23/48

    CPC分类号： H01L23/50 ,  H01L23/13 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15312 ,  H01L2924/19041 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A semiconductor package includes a metal plate in which one or more openings are formed, the metal plate mounting a semiconductor chip and a printed wire pattern substrate, e.g. a PCB, mounting one or more decoupling capacitors. The semiconductor chip is in direct contact with the metal plate to improve thermal characteristics, and the substrate is supported by the metal plate to increase mechanical stability of the package. The one or more openings in the metal plate accommodate the passing therethrough of plural pins electrically connected via the printed wire pattern substrate to the semiconductor chip. The semiconductor package can be usefully applied to a digital micro-mirror device (DMD) semiconductor package for use in a projection display device.

    摘要翻译： 半导体封装包括其中形成有一个或多个开口的金属板，安装半导体芯片的金属板和印刷的线图案衬底，例如， PCB，安装一个或多个去耦电容器。 半导体芯片与金属板直接接触以改善热特性，并且基板由金属板支撑以增加封装的机械稳定性。 金属板中的一个或多个开口适应通过印刷的线图案基板电连接到半导体芯片的多个引脚的穿过。 半导体封装可以有用地应用于用于投影显示装置的数字微镜器件（DMD）半导体封装。

    Tape circuit substrate and semicondutor chip package using the same
    5.
    发明授权
    Tape circuit substrate and semicondutor chip package using the same 有权
    胶带电路基板和半导体芯片封装使用相同

    公开(公告)号：US07183660B2

    公开(公告)日：2007-02-27

    申请号：US10949091

    申请日：2004-09-23

    申请人： Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim

    发明人： Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim

    IPC分类号： H01L23/52 ,  H01L23/48 ,  H01L29/40

    CPC分类号： H01L23/49572 ,  H01L23/3157 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/00 ,  H01L2224/05599

    摘要： A tape circuit substrate comprises a base film made of an insulating material, and a wiring pattern layer which is formed on the base film and has first leads that are connected to electrode pads arranged near a periphery of a semiconductor chip and second leads that are connected to electrode pads arranged near the center of the semiconductor chip. The semiconductor chip package comprises a semiconductor chip electrically bonded to the tape circuit substrate through chip bumps. In such a case, each of the leads is configured such that a tip end thereof to be bonded to the electrode pad has a width larger than that of a body portion thereof. According to the present invention, since the interval between the lead and the electrode pad can be made even narrower, a fine pitch semiconductor device can be realized.

    摘要翻译： 带状电路基板包括由绝缘材料制成的基膜和形成在基膜上的布线图案层，并且具有连接到布置在半导体芯片的周围附近的电极焊盘的第一引线和连接的第二引线 到布置在半导体芯片的中心附近的电极焊盘。 半导体芯片封装包括通过芯片凸块电连接到带电路基板的半导体芯片。 在这种情况下，每个引线被构造成使得其与电极焊盘接合的前端的宽度大于其主体部分的宽度。 根据本发明，由于可以使引线与电极焊盘之间的间隔更窄，所以可以实现精细的间距半导体器件。

    Tape circuit substrate and semiconductor chip package using the same
    6.
    发明申请
    Tape circuit substrate and semiconductor chip package using the same 有权
    磁带电路基板和半导体芯片封装使用相同

    公开(公告)号：US20050082647A1

    公开(公告)日：2005-04-21

    申请号：US10949091

    申请日：2004-09-23

    申请人： Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim

    发明人： Si-Hoon Lee ,  Sa-Yoon Kang ,  Dong-Han Kim

    IPC分类号： H01L21/60 ,  H01L23/28 ,  H01L23/31 ,  H01L23/495

    CPC分类号： H01L23/49572 ,  H01L23/3157 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/00 ,  H01L2224/05599

    摘要： A tape circuit substrate comprises a base film made of an insulating material, and a wiring pattern layer which is formed on the base film and has first leads that are connected to electrode pads arranged near a periphery of a semiconductor chip and second leads that are connected to electrode pads arranged near the center of the semiconductor chip. The semiconductor chip package comprises a semiconductor chip electrically bonded to the tape circuit substrate through chip bumps. In such a case, each of the leads is configured such that a tip end thereof to be bonded to the electrode pad has a width larger than that of a body portion thereof. According to the present invention, since the interval between the lead and the electrode pad can be made even narrower, a fine pitch semiconductor device can be realized.

    摘要翻译： 带状电路基板包括由绝缘材料制成的基膜和形成在基膜上的布线图案层，并且具有连接到布置在半导体芯片的周围附近的电极焊盘的第一引线和连接的第二引线 到布置在半导体芯片的中心附近的电极焊盘。 半导体芯片封装包括通过芯片凸块电连接到带电路基板的半导体芯片。 在这种情况下，每个引线被构造成使得其与电极焊盘接合的前端的宽度大于其主体部分的宽度。 根据本发明，由于可以使引线与电极焊盘之间的间隔更窄，所以可以实现精细的间距半导体器件。

    Tape circuit substrate with reduced size of base film
    7.
    发明申请
    Tape circuit substrate with reduced size of base film 有权
    带电路基板，底片尺寸减小

    公开(公告)号：US20100149775A1

    公开(公告)日：2010-06-17

    申请号：US12584516

    申请日：2009-09-08

    申请人： Sang-Ho Park ,  Sa-Yoon Kang ,  Si-Hoon Lee

    发明人： Sang-Ho Park ,  Sa-Yoon Kang ,  Si-Hoon Lee

    IPC分类号： H05K7/00

    CPC分类号： H01L23/49838 ,  G02F1/13452 ,  H01L21/563 ,  H01L23/4985 ,  H01L2924/0002 ,  H01L2924/12044 ,  H05K1/142 ,  H05K1/147 ,  H05K3/361 ,  H05K2201/09227 ,  H05K2201/10681 ,  H01L2924/00

    摘要： A tape circuit substrate includes a base film with first wiring and second wiring disposed on the base film. The first wiring extends into a chip mount portion through a first side and bends within the chip mount portion toward a second side. The second wiring extends into the chip mount portion through a third side and bends within the chip mount portion toward the second side. The first, second, and third sides are different sides of the chip mount portion. Thus, size and in turn cost of the base film are minimized by arranging wirings within the chip mount portion for further miniaturization of electronic devices, such as a display panel assembly, using the tape circuit substrate.

    摘要翻译： 带状电路基板包括具有第一布线的基膜和设置在基膜上的第二布线。 第一布线通过第一侧延伸到芯片安装部分中，并且在芯片安装部分内向第二侧弯曲。 第二布线通过第三侧延伸到芯片安装部分，并且在芯片安装部分内向第二侧弯曲。 第一，第二和第三面是芯片安装部分的不同侧面。 因此，通过在芯片安装部分内布置布线以使得使用带电路基板的诸如显示面板组件的电子设备的进一步小型化来使基膜的尺寸和成本进一步降低。

    Tape circuit substrate with reduced size of base film
    8.
    发明授权
    Tape circuit substrate with reduced size of base film 有权
    带电路基板，底片尺寸减小

    公开(公告)号：US07948768B2

    公开(公告)日：2011-05-24

    申请号：US12584516

    申请日：2009-09-08

    申请人： Sang-Ho Park ,  Sa-Yoon Kang ,  Si-Hoon Lee

    发明人： Sang-Ho Park ,  Sa-Yoon Kang ,  Si-Hoon Lee

    IPC分类号： H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

    CPC分类号： H01L23/49838 ,  G02F1/13452 ,  H01L21/563 ,  H01L23/4985 ,  H01L2924/0002 ,  H01L2924/12044 ,  H05K1/142 ,  H05K1/147 ,  H05K3/361 ,  H05K2201/09227 ,  H05K2201/10681 ,  H01L2924/00

    摘要： A tape circuit substrate includes a base film with first wiring and second wiring disposed on the base film. The first wiring extends into a chip mount portion through a first side and bends within the chip mount portion toward a second side. The second wiring extends into the chip mount portion through a third side and bends within the chip mount portion toward the second side. The first, second, and third sides are different sides of the chip mount portion. Thus, size and in turn cost of the base film are minimized by arranging wirings within the chip mount portion for further miniaturization of electronic devices, such as a display panel assembly, using the tape circuit substrate.

    摘要翻译： 带状电路基板包括具有第一布线的基膜和设置在基膜上的第二布线。 第一布线通过第一侧延伸到芯片安装部分中，并且在芯片安装部分内向第二侧弯曲。 第二布线通过第三侧延伸到芯片安装部分，并且在芯片安装部分内向第二侧弯曲。 第一，第二和第三面是芯片安装部分的不同侧面。 因此，通过在芯片安装部分内布置布线以使得使用带电路基板的诸如显示面板组件的电子设备的进一步小型化来使基膜的尺寸和成本进一步降低。